1*78eb2a41SJagan Teki // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*78eb2a41SJagan Teki /* 3*78eb2a41SJagan Teki * Copyright (C) 2018 Amarula Solutions. 4*78eb2a41SJagan Teki * Author: Jagan Teki <jagan@amarulasolutions.com> 5*78eb2a41SJagan Teki */ 6*78eb2a41SJagan Teki 7*78eb2a41SJagan Teki #include <common.h> 8*78eb2a41SJagan Teki #include <clk-uclass.h> 9*78eb2a41SJagan Teki #include <dm.h> 10*78eb2a41SJagan Teki #include <errno.h> 11*78eb2a41SJagan Teki #include <asm/arch/ccu.h> 12*78eb2a41SJagan Teki #include <dt-bindings/clock/sun8i-r40-ccu.h> 13*78eb2a41SJagan Teki #include <dt-bindings/reset/sun8i-r40-ccu.h> 14*78eb2a41SJagan Teki 15*78eb2a41SJagan Teki static struct ccu_clk_gate r40_gates[] = { 16*78eb2a41SJagan Teki [CLK_BUS_OTG] = GATE(0x060, BIT(25)), 17*78eb2a41SJagan Teki [CLK_BUS_EHCI0] = GATE(0x060, BIT(26)), 18*78eb2a41SJagan Teki [CLK_BUS_EHCI1] = GATE(0x060, BIT(27)), 19*78eb2a41SJagan Teki [CLK_BUS_EHCI2] = GATE(0x060, BIT(28)), 20*78eb2a41SJagan Teki [CLK_BUS_OHCI0] = GATE(0x060, BIT(29)), 21*78eb2a41SJagan Teki [CLK_BUS_OHCI1] = GATE(0x060, BIT(30)), 22*78eb2a41SJagan Teki [CLK_BUS_OHCI2] = GATE(0x060, BIT(31)), 23*78eb2a41SJagan Teki 24*78eb2a41SJagan Teki [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), 25*78eb2a41SJagan Teki [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)), 26*78eb2a41SJagan Teki [CLK_USB_PHY2] = GATE(0x0cc, BIT(10)), 27*78eb2a41SJagan Teki [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), 28*78eb2a41SJagan Teki [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), 29*78eb2a41SJagan Teki [CLK_USB_OHCI2] = GATE(0x0cc, BIT(18)), 30*78eb2a41SJagan Teki }; 31*78eb2a41SJagan Teki 32*78eb2a41SJagan Teki static struct ccu_reset r40_resets[] = { 33*78eb2a41SJagan Teki [RST_USB_PHY0] = RESET(0x0cc, BIT(0)), 34*78eb2a41SJagan Teki [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), 35*78eb2a41SJagan Teki [RST_USB_PHY2] = RESET(0x0cc, BIT(2)), 36*78eb2a41SJagan Teki 37*78eb2a41SJagan Teki [RST_BUS_OTG] = RESET(0x2c0, BIT(25)), 38*78eb2a41SJagan Teki [RST_BUS_EHCI0] = RESET(0x2c0, BIT(26)), 39*78eb2a41SJagan Teki [RST_BUS_EHCI1] = RESET(0x2c0, BIT(27)), 40*78eb2a41SJagan Teki [RST_BUS_EHCI2] = RESET(0x2c0, BIT(28)), 41*78eb2a41SJagan Teki [RST_BUS_OHCI0] = RESET(0x2c0, BIT(29)), 42*78eb2a41SJagan Teki [RST_BUS_OHCI1] = RESET(0x2c0, BIT(30)), 43*78eb2a41SJagan Teki [RST_BUS_OHCI2] = RESET(0x2c0, BIT(31)), 44*78eb2a41SJagan Teki }; 45*78eb2a41SJagan Teki 46*78eb2a41SJagan Teki static const struct ccu_desc r40_ccu_desc = { 47*78eb2a41SJagan Teki .gates = r40_gates, 48*78eb2a41SJagan Teki .resets = r40_resets, 49*78eb2a41SJagan Teki }; 50*78eb2a41SJagan Teki 51*78eb2a41SJagan Teki static int r40_clk_bind(struct udevice *dev) 52*78eb2a41SJagan Teki { 53*78eb2a41SJagan Teki return sunxi_reset_bind(dev, ARRAY_SIZE(r40_resets)); 54*78eb2a41SJagan Teki } 55*78eb2a41SJagan Teki 56*78eb2a41SJagan Teki static const struct udevice_id r40_clk_ids[] = { 57*78eb2a41SJagan Teki { .compatible = "allwinner,sun8i-r40-ccu", 58*78eb2a41SJagan Teki .data = (ulong)&r40_ccu_desc }, 59*78eb2a41SJagan Teki { } 60*78eb2a41SJagan Teki }; 61*78eb2a41SJagan Teki 62*78eb2a41SJagan Teki U_BOOT_DRIVER(clk_sun8i_r40) = { 63*78eb2a41SJagan Teki .name = "sun8i_r40_ccu", 64*78eb2a41SJagan Teki .id = UCLASS_CLK, 65*78eb2a41SJagan Teki .of_match = r40_clk_ids, 66*78eb2a41SJagan Teki .priv_auto_alloc_size = sizeof(struct ccu_priv), 67*78eb2a41SJagan Teki .ops = &sunxi_clk_ops, 68*78eb2a41SJagan Teki .probe = sunxi_clk_probe, 69*78eb2a41SJagan Teki .bind = r40_clk_bind, 70*78eb2a41SJagan Teki }; 71