178eb2a41SJagan Teki // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 278eb2a41SJagan Teki /* 378eb2a41SJagan Teki * Copyright (C) 2018 Amarula Solutions. 478eb2a41SJagan Teki * Author: Jagan Teki <jagan@amarulasolutions.com> 578eb2a41SJagan Teki */ 678eb2a41SJagan Teki 778eb2a41SJagan Teki #include <common.h> 878eb2a41SJagan Teki #include <clk-uclass.h> 978eb2a41SJagan Teki #include <dm.h> 1078eb2a41SJagan Teki #include <errno.h> 1178eb2a41SJagan Teki #include <asm/arch/ccu.h> 1278eb2a41SJagan Teki #include <dt-bindings/clock/sun8i-r40-ccu.h> 1378eb2a41SJagan Teki #include <dt-bindings/reset/sun8i-r40-ccu.h> 1478eb2a41SJagan Teki 1578eb2a41SJagan Teki static struct ccu_clk_gate r40_gates[] = { 16bb3e5aa2SAndre Przywara [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), 17bb3e5aa2SAndre Przywara [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), 18bb3e5aa2SAndre Przywara [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), 19bb3e5aa2SAndre Przywara [CLK_BUS_MMC3] = GATE(0x060, BIT(11)), 2082111469SJagan Teki [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), 2182111469SJagan Teki [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), 2282111469SJagan Teki [CLK_BUS_SPI2] = GATE(0x060, BIT(22)), 2382111469SJagan Teki [CLK_BUS_SPI3] = GATE(0x060, BIT(23)), 2478eb2a41SJagan Teki [CLK_BUS_OTG] = GATE(0x060, BIT(25)), 2578eb2a41SJagan Teki [CLK_BUS_EHCI0] = GATE(0x060, BIT(26)), 2678eb2a41SJagan Teki [CLK_BUS_EHCI1] = GATE(0x060, BIT(27)), 2778eb2a41SJagan Teki [CLK_BUS_EHCI2] = GATE(0x060, BIT(28)), 2878eb2a41SJagan Teki [CLK_BUS_OHCI0] = GATE(0x060, BIT(29)), 2978eb2a41SJagan Teki [CLK_BUS_OHCI1] = GATE(0x060, BIT(30)), 3078eb2a41SJagan Teki [CLK_BUS_OHCI2] = GATE(0x060, BIT(31)), 3178eb2a41SJagan Teki 32*68620c96SJagan Teki [CLK_BUS_GMAC] = GATE(0x064, BIT(17)), 33*68620c96SJagan Teki 344acc7119SJagan Teki [CLK_BUS_UART0] = GATE(0x06c, BIT(16)), 354acc7119SJagan Teki [CLK_BUS_UART1] = GATE(0x06c, BIT(17)), 364acc7119SJagan Teki [CLK_BUS_UART2] = GATE(0x06c, BIT(18)), 374acc7119SJagan Teki [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), 384acc7119SJagan Teki [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), 394acc7119SJagan Teki [CLK_BUS_UART5] = GATE(0x06c, BIT(21)), 404acc7119SJagan Teki [CLK_BUS_UART6] = GATE(0x06c, BIT(22)), 414acc7119SJagan Teki [CLK_BUS_UART7] = GATE(0x06c, BIT(23)), 424acc7119SJagan Teki 4382111469SJagan Teki [CLK_SPI0] = GATE(0x0a0, BIT(31)), 4482111469SJagan Teki [CLK_SPI1] = GATE(0x0a4, BIT(31)), 4582111469SJagan Teki [CLK_SPI2] = GATE(0x0a8, BIT(31)), 4682111469SJagan Teki [CLK_SPI3] = GATE(0x0ac, BIT(31)), 4782111469SJagan Teki 4878eb2a41SJagan Teki [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), 4978eb2a41SJagan Teki [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)), 5078eb2a41SJagan Teki [CLK_USB_PHY2] = GATE(0x0cc, BIT(10)), 5178eb2a41SJagan Teki [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), 5278eb2a41SJagan Teki [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), 5378eb2a41SJagan Teki [CLK_USB_OHCI2] = GATE(0x0cc, BIT(18)), 5478eb2a41SJagan Teki }; 5578eb2a41SJagan Teki 5678eb2a41SJagan Teki static struct ccu_reset r40_resets[] = { 5778eb2a41SJagan Teki [RST_USB_PHY0] = RESET(0x0cc, BIT(0)), 5878eb2a41SJagan Teki [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), 5978eb2a41SJagan Teki [RST_USB_PHY2] = RESET(0x0cc, BIT(2)), 6078eb2a41SJagan Teki 61bb3e5aa2SAndre Przywara [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), 62bb3e5aa2SAndre Przywara [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), 63bb3e5aa2SAndre Przywara [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), 64bb3e5aa2SAndre Przywara [RST_BUS_MMC3] = RESET(0x2c0, BIT(11)), 65*68620c96SJagan Teki [RST_BUS_GMAC] = RESET(0x2c0, BIT(17)), 6682111469SJagan Teki [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), 6782111469SJagan Teki [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), 6882111469SJagan Teki [RST_BUS_SPI2] = RESET(0x2c0, BIT(22)), 6982111469SJagan Teki [RST_BUS_SPI3] = RESET(0x2c0, BIT(23)), 7078eb2a41SJagan Teki [RST_BUS_OTG] = RESET(0x2c0, BIT(25)), 7178eb2a41SJagan Teki [RST_BUS_EHCI0] = RESET(0x2c0, BIT(26)), 7278eb2a41SJagan Teki [RST_BUS_EHCI1] = RESET(0x2c0, BIT(27)), 7378eb2a41SJagan Teki [RST_BUS_EHCI2] = RESET(0x2c0, BIT(28)), 7478eb2a41SJagan Teki [RST_BUS_OHCI0] = RESET(0x2c0, BIT(29)), 7578eb2a41SJagan Teki [RST_BUS_OHCI1] = RESET(0x2c0, BIT(30)), 7678eb2a41SJagan Teki [RST_BUS_OHCI2] = RESET(0x2c0, BIT(31)), 778606f960SJagan Teki 788606f960SJagan Teki [RST_BUS_UART0] = RESET(0x2d8, BIT(16)), 798606f960SJagan Teki [RST_BUS_UART1] = RESET(0x2d8, BIT(17)), 808606f960SJagan Teki [RST_BUS_UART2] = RESET(0x2d8, BIT(18)), 818606f960SJagan Teki [RST_BUS_UART3] = RESET(0x2d8, BIT(19)), 828606f960SJagan Teki [RST_BUS_UART4] = RESET(0x2d8, BIT(20)), 838606f960SJagan Teki [RST_BUS_UART5] = RESET(0x2d8, BIT(21)), 848606f960SJagan Teki [RST_BUS_UART6] = RESET(0x2d8, BIT(22)), 858606f960SJagan Teki [RST_BUS_UART7] = RESET(0x2d8, BIT(23)), 8678eb2a41SJagan Teki }; 8778eb2a41SJagan Teki 8878eb2a41SJagan Teki static const struct ccu_desc r40_ccu_desc = { 8978eb2a41SJagan Teki .gates = r40_gates, 9078eb2a41SJagan Teki .resets = r40_resets, 9178eb2a41SJagan Teki }; 9278eb2a41SJagan Teki 9378eb2a41SJagan Teki static int r40_clk_bind(struct udevice *dev) 9478eb2a41SJagan Teki { 9578eb2a41SJagan Teki return sunxi_reset_bind(dev, ARRAY_SIZE(r40_resets)); 9678eb2a41SJagan Teki } 9778eb2a41SJagan Teki 9878eb2a41SJagan Teki static const struct udevice_id r40_clk_ids[] = { 9978eb2a41SJagan Teki { .compatible = "allwinner,sun8i-r40-ccu", 10078eb2a41SJagan Teki .data = (ulong)&r40_ccu_desc }, 10178eb2a41SJagan Teki { } 10278eb2a41SJagan Teki }; 10378eb2a41SJagan Teki 10478eb2a41SJagan Teki U_BOOT_DRIVER(clk_sun8i_r40) = { 10578eb2a41SJagan Teki .name = "sun8i_r40_ccu", 10678eb2a41SJagan Teki .id = UCLASS_CLK, 10778eb2a41SJagan Teki .of_match = r40_clk_ids, 10878eb2a41SJagan Teki .priv_auto_alloc_size = sizeof(struct ccu_priv), 10978eb2a41SJagan Teki .ops = &sunxi_clk_ops, 11078eb2a41SJagan Teki .probe = sunxi_clk_probe, 11178eb2a41SJagan Teki .bind = r40_clk_bind, 11278eb2a41SJagan Teki }; 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