1*b630d57dSAnup Patel // SPDX-License-Identifier: GPL-2.0+
2*b630d57dSAnup Patel /*
3*b630d57dSAnup Patel * Copyright (c) 2019 Western Digital Corporation or its affiliates.
4*b630d57dSAnup Patel *
5*b630d57dSAnup Patel * Author: Anup Patel <anup.patel@wdc.com>
6*b630d57dSAnup Patel */
7*b630d57dSAnup Patel
8*b630d57dSAnup Patel #include <common.h>
9*b630d57dSAnup Patel #include <clk-uclass.h>
10*b630d57dSAnup Patel #include <div64.h>
11*b630d57dSAnup Patel #include <dm.h>
12*b630d57dSAnup Patel
13*b630d57dSAnup Patel struct clk_fixed_factor {
14*b630d57dSAnup Patel struct clk parent;
15*b630d57dSAnup Patel unsigned int div;
16*b630d57dSAnup Patel unsigned int mult;
17*b630d57dSAnup Patel };
18*b630d57dSAnup Patel
19*b630d57dSAnup Patel #define to_clk_fixed_factor(dev) \
20*b630d57dSAnup Patel ((struct clk_fixed_factor *)dev_get_platdata(dev))
21*b630d57dSAnup Patel
clk_fixed_factor_get_rate(struct clk * clk)22*b630d57dSAnup Patel static ulong clk_fixed_factor_get_rate(struct clk *clk)
23*b630d57dSAnup Patel {
24*b630d57dSAnup Patel uint64_t rate;
25*b630d57dSAnup Patel struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev);
26*b630d57dSAnup Patel
27*b630d57dSAnup Patel if (clk->id != 0)
28*b630d57dSAnup Patel return -EINVAL;
29*b630d57dSAnup Patel
30*b630d57dSAnup Patel rate = clk_get_rate(&ff->parent);
31*b630d57dSAnup Patel if (IS_ERR_VALUE(rate))
32*b630d57dSAnup Patel return rate;
33*b630d57dSAnup Patel
34*b630d57dSAnup Patel do_div(rate, ff->div);
35*b630d57dSAnup Patel
36*b630d57dSAnup Patel return rate * ff->mult;
37*b630d57dSAnup Patel }
38*b630d57dSAnup Patel
39*b630d57dSAnup Patel const struct clk_ops clk_fixed_factor_ops = {
40*b630d57dSAnup Patel .get_rate = clk_fixed_factor_get_rate,
41*b630d57dSAnup Patel };
42*b630d57dSAnup Patel
clk_fixed_factor_ofdata_to_platdata(struct udevice * dev)43*b630d57dSAnup Patel static int clk_fixed_factor_ofdata_to_platdata(struct udevice *dev)
44*b630d57dSAnup Patel {
45*b630d57dSAnup Patel #if !CONFIG_IS_ENABLED(OF_PLATDATA)
46*b630d57dSAnup Patel int err;
47*b630d57dSAnup Patel struct clk_fixed_factor *ff = to_clk_fixed_factor(dev);
48*b630d57dSAnup Patel
49*b630d57dSAnup Patel err = clk_get_by_index(dev, 0, &ff->parent);
50*b630d57dSAnup Patel if (err)
51*b630d57dSAnup Patel return err;
52*b630d57dSAnup Patel
53*b630d57dSAnup Patel ff->div = dev_read_u32_default(dev, "clock-div", 1);
54*b630d57dSAnup Patel ff->mult = dev_read_u32_default(dev, "clock-mult", 1);
55*b630d57dSAnup Patel #endif
56*b630d57dSAnup Patel
57*b630d57dSAnup Patel return 0;
58*b630d57dSAnup Patel }
59*b630d57dSAnup Patel
60*b630d57dSAnup Patel static const struct udevice_id clk_fixed_factor_match[] = {
61*b630d57dSAnup Patel {
62*b630d57dSAnup Patel .compatible = "fixed-factor-clock",
63*b630d57dSAnup Patel },
64*b630d57dSAnup Patel { /* sentinel */ }
65*b630d57dSAnup Patel };
66*b630d57dSAnup Patel
67*b630d57dSAnup Patel U_BOOT_DRIVER(clk_fixed_factor) = {
68*b630d57dSAnup Patel .name = "fixed_factor_clock",
69*b630d57dSAnup Patel .id = UCLASS_CLK,
70*b630d57dSAnup Patel .of_match = clk_fixed_factor_match,
71*b630d57dSAnup Patel .ofdata_to_platdata = clk_fixed_factor_ofdata_to_platdata,
72*b630d57dSAnup Patel .platdata_auto_alloc_size = sizeof(struct clk_fixed_factor),
73*b630d57dSAnup Patel .ops = &clk_fixed_factor_ops,
74*b630d57dSAnup Patel };
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