1 /* 2 * Copyright (C) 2018 Microhip / Atmel Corporation 3 * Wenyou.Yang <wenyou.yang@microchip.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <clk-uclass.h> 10 #include <dm/device.h> 11 #include <linux/io.h> 12 #include <mach/at91_pmc.h> 13 #include "pmc.h" 14 15 static int at91_plladiv_clk_enable(struct clk *clk) 16 { 17 return 0; 18 } 19 20 static ulong at91_plladiv_clk_get_rate(struct clk *clk) 21 { 22 struct pmc_platdata *plat = dev_get_platdata(clk->dev); 23 struct at91_pmc *pmc = plat->reg_base; 24 struct clk source; 25 ulong clk_rate; 26 int ret; 27 28 ret = clk_get_by_index(clk->dev, 0, &source); 29 if (ret) 30 return -EINVAL; 31 32 clk_rate = clk_get_rate(&source); 33 if (readl(&pmc->mckr) & AT91_PMC_MCKR_PLLADIV_2) 34 clk_rate /= 2; 35 36 return clk_rate; 37 } 38 39 static ulong at91_plladiv_clk_set_rate(struct clk *clk, ulong rate) 40 { 41 struct pmc_platdata *plat = dev_get_platdata(clk->dev); 42 struct at91_pmc *pmc = plat->reg_base; 43 struct clk source; 44 ulong parent_rate; 45 int ret; 46 47 ret = clk_get_by_index(clk->dev, 0, &source); 48 if (ret) 49 return -EINVAL; 50 51 parent_rate = clk_get_rate(&source); 52 if ((parent_rate != rate) && ((parent_rate) / 2 != rate)) 53 return -EINVAL; 54 55 if (parent_rate != rate) { 56 writel((readl(&pmc->mckr) | AT91_PMC_MCKR_PLLADIV_2), 57 &pmc->mckr); 58 } 59 60 return 0; 61 } 62 63 static struct clk_ops at91_plladiv_clk_ops = { 64 .enable = at91_plladiv_clk_enable, 65 .get_rate = at91_plladiv_clk_get_rate, 66 .set_rate = at91_plladiv_clk_set_rate, 67 }; 68 69 static int at91_plladiv_clk_probe(struct udevice *dev) 70 { 71 return at91_pmc_core_probe(dev); 72 } 73 74 static const struct udevice_id at91_plladiv_clk_match[] = { 75 { .compatible = "atmel,at91sam9x5-clk-plldiv" }, 76 {} 77 }; 78 79 U_BOOT_DRIVER(at91_plladiv_clk) = { 80 .name = "at91-plladiv-clk", 81 .id = UCLASS_CLK, 82 .of_match = at91_plladiv_clk_match, 83 .probe = at91_plladiv_clk_probe, 84 .platdata_auto_alloc_size = sizeof(struct pmc_platdata), 85 .ops = &at91_plladiv_clk_ops, 86 }; 87