xref: /openbmc/u-boot/drivers/clk/at91/clk-master.c (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
29e5935c0SWenyou Yang /*
39e5935c0SWenyou Yang  * Copyright (C) 2016 Atmel Corporation
49e5935c0SWenyou Yang  *               Wenyou.Yang <wenyou.yang@atmel.com>
59e5935c0SWenyou Yang  */
69e5935c0SWenyou Yang 
79e5935c0SWenyou Yang #include <common.h>
89e5935c0SWenyou Yang #include <clk-uclass.h>
99d922450SSimon Glass #include <dm.h>
109e5935c0SWenyou Yang 
119e5935c0SWenyou Yang DECLARE_GLOBAL_DATA_PTR;
129e5935c0SWenyou Yang 
at91_master_clk_get_rate(struct clk * clk)139e5935c0SWenyou Yang static ulong at91_master_clk_get_rate(struct clk *clk)
149e5935c0SWenyou Yang {
159e5935c0SWenyou Yang 	return gd->arch.mck_rate_hz;
169e5935c0SWenyou Yang }
179e5935c0SWenyou Yang 
189e5935c0SWenyou Yang static struct clk_ops at91_master_clk_ops = {
199e5935c0SWenyou Yang 	.get_rate = at91_master_clk_get_rate,
209e5935c0SWenyou Yang };
219e5935c0SWenyou Yang 
229e5935c0SWenyou Yang static const struct udevice_id at91_master_clk_match[] = {
23a9513d47SWenyou Yang 	{ .compatible = "atmel,at91rm9200-clk-master" },
249e5935c0SWenyou Yang 	{ .compatible = "atmel,at91sam9x5-clk-master" },
259e5935c0SWenyou Yang 	{}
269e5935c0SWenyou Yang };
279e5935c0SWenyou Yang 
289e5935c0SWenyou Yang U_BOOT_DRIVER(at91_master_clk) = {
299e5935c0SWenyou Yang 	.name = "at91-master-clk",
309e5935c0SWenyou Yang 	.id = UCLASS_CLK,
319e5935c0SWenyou Yang 	.of_match = at91_master_clk_match,
329e5935c0SWenyou Yang 	.ops = &at91_master_clk_ops,
339e5935c0SWenyou Yang };
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