1ece92f85SJason Jin /**************************************************************************** 2ece92f85SJason Jin * 3ece92f85SJason Jin * Realmode X86 Emulator Library 4ece92f85SJason Jin * 5ece92f85SJason Jin * Copyright (C) 1991-2004 SciTech Software, Inc. 6ece92f85SJason Jin * Copyright (C) David Mosberger-Tang 7ece92f85SJason Jin * Copyright (C) 1999 Egbert Eich 8ece92f85SJason Jin * 9ece92f85SJason Jin * ======================================================================== 10ece92f85SJason Jin * 11ece92f85SJason Jin * Permission to use, copy, modify, distribute, and sell this software and 12ece92f85SJason Jin * its documentation for any purpose is hereby granted without fee, 13ece92f85SJason Jin * provided that the above copyright notice appear in all copies and that 14ece92f85SJason Jin * both that copyright notice and this permission notice appear in 15ece92f85SJason Jin * supporting documentation, and that the name of the authors not be used 16ece92f85SJason Jin * in advertising or publicity pertaining to distribution of the software 17ece92f85SJason Jin * without specific, written prior permission. The authors makes no 18ece92f85SJason Jin * representations about the suitability of this software for any purpose. 19ece92f85SJason Jin * It is provided "as is" without express or implied warranty. 20ece92f85SJason Jin * 21ece92f85SJason Jin * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 22ece92f85SJason Jin * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 23ece92f85SJason Jin * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 24ece92f85SJason Jin * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF 25ece92f85SJason Jin * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 26ece92f85SJason Jin * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 27ece92f85SJason Jin * PERFORMANCE OF THIS SOFTWARE. 28ece92f85SJason Jin * 29ece92f85SJason Jin * ======================================================================== 30ece92f85SJason Jin * 31ece92f85SJason Jin * Language: ANSI C 32ece92f85SJason Jin * Environment: Any 33ece92f85SJason Jin * Developer: Kendall Bennett 34ece92f85SJason Jin * 35ece92f85SJason Jin * Description: Header file for x86 register definitions. 36ece92f85SJason Jin * 37ece92f85SJason Jin ****************************************************************************/ 38ece92f85SJason Jin 39ece92f85SJason Jin #ifndef __X86EMU_REGS_H 40ece92f85SJason Jin #define __X86EMU_REGS_H 41ece92f85SJason Jin 42ece92f85SJason Jin /*---------------------- Macros and type definitions ----------------------*/ 43ece92f85SJason Jin 44ece92f85SJason Jin #pragma pack(1) 45ece92f85SJason Jin 46ece92f85SJason Jin /* 47ece92f85SJason Jin * General EAX, EBX, ECX, EDX type registers. Note that for 48ece92f85SJason Jin * portability, and speed, the issue of byte swapping is not addressed 49ece92f85SJason Jin * in the registers. All registers are stored in the default format 50ece92f85SJason Jin * available on the host machine. The only critical issue is that the 51ece92f85SJason Jin * registers should line up EXACTLY in the same manner as they do in 52ece92f85SJason Jin * the 386. That is: 53ece92f85SJason Jin * 54ece92f85SJason Jin * EAX & 0xff === AL 55ece92f85SJason Jin * EAX & 0xffff == AX 56ece92f85SJason Jin * 57ece92f85SJason Jin * etc. The result is that alot of the calculations can then be 58ece92f85SJason Jin * done using the native instruction set fully. 59ece92f85SJason Jin */ 60ece92f85SJason Jin 61ece92f85SJason Jin #ifdef __BIG_ENDIAN__ 62ece92f85SJason Jin 63ece92f85SJason Jin typedef struct { 64ece92f85SJason Jin u32 e_reg; 65ece92f85SJason Jin } I32_reg_t; 66ece92f85SJason Jin 67ece92f85SJason Jin typedef struct { 68ece92f85SJason Jin u16 filler0, x_reg; 69ece92f85SJason Jin } I16_reg_t; 70ece92f85SJason Jin 71ece92f85SJason Jin typedef struct { 72ece92f85SJason Jin u8 filler0, filler1, h_reg, l_reg; 73ece92f85SJason Jin } I8_reg_t; 74ece92f85SJason Jin 75ece92f85SJason Jin #else /* !__BIG_ENDIAN__ */ 76ece92f85SJason Jin 77ece92f85SJason Jin typedef struct { 78ece92f85SJason Jin u32 e_reg; 79ece92f85SJason Jin } I32_reg_t; 80ece92f85SJason Jin 81ece92f85SJason Jin typedef struct { 82ece92f85SJason Jin u16 x_reg; 83ece92f85SJason Jin } I16_reg_t; 84ece92f85SJason Jin 85ece92f85SJason Jin typedef struct { 86ece92f85SJason Jin u8 l_reg, h_reg; 87ece92f85SJason Jin } I8_reg_t; 88ece92f85SJason Jin 89ece92f85SJason Jin #endif /* BIG_ENDIAN */ 90ece92f85SJason Jin 91ece92f85SJason Jin typedef union { 92ece92f85SJason Jin I32_reg_t I32_reg; 93ece92f85SJason Jin I16_reg_t I16_reg; 94ece92f85SJason Jin I8_reg_t I8_reg; 95ece92f85SJason Jin } i386_general_register; 96ece92f85SJason Jin 97ece92f85SJason Jin struct i386_general_regs { 98ece92f85SJason Jin i386_general_register A, B, C, D; 99ece92f85SJason Jin }; 100ece92f85SJason Jin 101ece92f85SJason Jin typedef struct i386_general_regs Gen_reg_t; 102ece92f85SJason Jin 103ece92f85SJason Jin struct i386_special_regs { 104ece92f85SJason Jin i386_general_register SP, BP, SI, DI, IP; 105ece92f85SJason Jin u32 FLAGS; 106ece92f85SJason Jin }; 107ece92f85SJason Jin 108ece92f85SJason Jin /* 109ece92f85SJason Jin * Segment registers here represent the 16 bit quantities 110ece92f85SJason Jin * CS, DS, ES, SS. 111ece92f85SJason Jin */ 112ece92f85SJason Jin 113ece92f85SJason Jin #undef CS 114ece92f85SJason Jin #undef DS 115ece92f85SJason Jin #undef SS 116ece92f85SJason Jin #undef ES 117ece92f85SJason Jin #undef FS 118ece92f85SJason Jin #undef GS 119ece92f85SJason Jin 120ece92f85SJason Jin struct i386_segment_regs { 121ece92f85SJason Jin u16 CS, DS, SS, ES, FS, GS; 122ece92f85SJason Jin }; 123ece92f85SJason Jin 124ece92f85SJason Jin /* 8 bit registers */ 125ece92f85SJason Jin #define R_AH gen.A.I8_reg.h_reg 126ece92f85SJason Jin #define R_AL gen.A.I8_reg.l_reg 127ece92f85SJason Jin #define R_BH gen.B.I8_reg.h_reg 128ece92f85SJason Jin #define R_BL gen.B.I8_reg.l_reg 129ece92f85SJason Jin #define R_CH gen.C.I8_reg.h_reg 130ece92f85SJason Jin #define R_CL gen.C.I8_reg.l_reg 131ece92f85SJason Jin #define R_DH gen.D.I8_reg.h_reg 132ece92f85SJason Jin #define R_DL gen.D.I8_reg.l_reg 133ece92f85SJason Jin 134ece92f85SJason Jin /* 16 bit registers */ 135ece92f85SJason Jin #define R_AX gen.A.I16_reg.x_reg 136ece92f85SJason Jin #define R_BX gen.B.I16_reg.x_reg 137ece92f85SJason Jin #define R_CX gen.C.I16_reg.x_reg 138ece92f85SJason Jin #define R_DX gen.D.I16_reg.x_reg 139ece92f85SJason Jin 140ece92f85SJason Jin /* 32 bit extended registers */ 141ece92f85SJason Jin #define R_EAX gen.A.I32_reg.e_reg 142ece92f85SJason Jin #define R_EBX gen.B.I32_reg.e_reg 143ece92f85SJason Jin #define R_ECX gen.C.I32_reg.e_reg 144ece92f85SJason Jin #define R_EDX gen.D.I32_reg.e_reg 145ece92f85SJason Jin 146ece92f85SJason Jin /* special registers */ 147ece92f85SJason Jin #define R_SP spc.SP.I16_reg.x_reg 148ece92f85SJason Jin #define R_BP spc.BP.I16_reg.x_reg 149ece92f85SJason Jin #define R_SI spc.SI.I16_reg.x_reg 150ece92f85SJason Jin #define R_DI spc.DI.I16_reg.x_reg 151ece92f85SJason Jin #define R_IP spc.IP.I16_reg.x_reg 152ece92f85SJason Jin #define R_FLG spc.FLAGS 153ece92f85SJason Jin 154ece92f85SJason Jin /* special registers */ 155ece92f85SJason Jin #define R_SP spc.SP.I16_reg.x_reg 156ece92f85SJason Jin #define R_BP spc.BP.I16_reg.x_reg 157ece92f85SJason Jin #define R_SI spc.SI.I16_reg.x_reg 158ece92f85SJason Jin #define R_DI spc.DI.I16_reg.x_reg 159ece92f85SJason Jin #define R_IP spc.IP.I16_reg.x_reg 160ece92f85SJason Jin #define R_FLG spc.FLAGS 161ece92f85SJason Jin 162ece92f85SJason Jin /* special registers */ 163ece92f85SJason Jin #define R_ESP spc.SP.I32_reg.e_reg 164ece92f85SJason Jin #define R_EBP spc.BP.I32_reg.e_reg 165ece92f85SJason Jin #define R_ESI spc.SI.I32_reg.e_reg 166ece92f85SJason Jin #define R_EDI spc.DI.I32_reg.e_reg 167ece92f85SJason Jin #define R_EIP spc.IP.I32_reg.e_reg 168ece92f85SJason Jin #define R_EFLG spc.FLAGS 169ece92f85SJason Jin 170ece92f85SJason Jin /* segment registers */ 171ece92f85SJason Jin #define R_CS seg.CS 172ece92f85SJason Jin #define R_DS seg.DS 173ece92f85SJason Jin #define R_SS seg.SS 174ece92f85SJason Jin #define R_ES seg.ES 175ece92f85SJason Jin #define R_FS seg.FS 176ece92f85SJason Jin #define R_GS seg.GS 177ece92f85SJason Jin 178ece92f85SJason Jin /* flag conditions */ 179ece92f85SJason Jin #define FB_CF 0x0001 /* CARRY flag */ 180ece92f85SJason Jin #define FB_PF 0x0004 /* PARITY flag */ 181ece92f85SJason Jin #define FB_AF 0x0010 /* AUX flag */ 182ece92f85SJason Jin #define FB_ZF 0x0040 /* ZERO flag */ 183ece92f85SJason Jin #define FB_SF 0x0080 /* SIGN flag */ 184ece92f85SJason Jin #define FB_TF 0x0100 /* TRAP flag */ 185ece92f85SJason Jin #define FB_IF 0x0200 /* INTERRUPT ENABLE flag */ 186ece92f85SJason Jin #define FB_DF 0x0400 /* DIR flag */ 187ece92f85SJason Jin #define FB_OF 0x0800 /* OVERFLOW flag */ 188ece92f85SJason Jin 189ece92f85SJason Jin /* 80286 and above always have bit#1 set */ 190ece92f85SJason Jin #define F_ALWAYS_ON (0x0002) /* flag bits always on */ 191ece92f85SJason Jin 192ece92f85SJason Jin /* 193ece92f85SJason Jin * Define a mask for only those flag bits we will ever pass back 194ece92f85SJason Jin * (via PUSHF) 195ece92f85SJason Jin */ 196ece92f85SJason Jin #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) 197ece92f85SJason Jin 198ece92f85SJason Jin /* following bits masked in to a 16bit quantity */ 199ece92f85SJason Jin 200ece92f85SJason Jin #define F_CF 0x0001 /* CARRY flag */ 201ece92f85SJason Jin #define F_PF 0x0004 /* PARITY flag */ 202ece92f85SJason Jin #define F_AF 0x0010 /* AUX flag */ 203ece92f85SJason Jin #define F_ZF 0x0040 /* ZERO flag */ 204ece92f85SJason Jin #define F_SF 0x0080 /* SIGN flag */ 205ece92f85SJason Jin #define F_TF 0x0100 /* TRAP flag */ 206ece92f85SJason Jin #define F_IF 0x0200 /* INTERRUPT ENABLE flag */ 207ece92f85SJason Jin #define F_DF 0x0400 /* DIR flag */ 208ece92f85SJason Jin #define F_OF 0x0800 /* OVERFLOW flag */ 209ece92f85SJason Jin 210ece92f85SJason Jin #define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag)) 211ece92f85SJason Jin #define SET_FLAG(flag) (M.x86.R_FLG |= (flag)) 212ece92f85SJason Jin #define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag)) 213ece92f85SJason Jin #define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag)) 214ece92f85SJason Jin #define CLEARALL_FLAG(m) (M.x86.R_FLG = 0) 215ece92f85SJason Jin 216ece92f85SJason Jin #define CONDITIONAL_SET_FLAG(COND,FLAG) \ 217ece92f85SJason Jin if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG) 218ece92f85SJason Jin 219ece92f85SJason Jin #define F_PF_CALC 0x010000 /* PARITY flag has been calced */ 220ece92f85SJason Jin #define F_ZF_CALC 0x020000 /* ZERO flag has been calced */ 221ece92f85SJason Jin #define F_SF_CALC 0x040000 /* SIGN flag has been calced */ 222ece92f85SJason Jin 223ece92f85SJason Jin #define F_ALL_CALC 0xff0000 /* All have been calced */ 224ece92f85SJason Jin 225ece92f85SJason Jin /* 226ece92f85SJason Jin * Emulator machine state. 227ece92f85SJason Jin * Segment usage control. 228ece92f85SJason Jin */ 229ece92f85SJason Jin #define SYSMODE_SEG_DS_SS 0x00000001 230ece92f85SJason Jin #define SYSMODE_SEGOVR_CS 0x00000002 231ece92f85SJason Jin #define SYSMODE_SEGOVR_DS 0x00000004 232ece92f85SJason Jin #define SYSMODE_SEGOVR_ES 0x00000008 233ece92f85SJason Jin #define SYSMODE_SEGOVR_FS 0x00000010 234ece92f85SJason Jin #define SYSMODE_SEGOVR_GS 0x00000020 235ece92f85SJason Jin #define SYSMODE_SEGOVR_SS 0x00000040 236ece92f85SJason Jin #define SYSMODE_PREFIX_REPE 0x00000080 237ece92f85SJason Jin #define SYSMODE_PREFIX_REPNE 0x00000100 238ece92f85SJason Jin #define SYSMODE_PREFIX_DATA 0x00000200 239ece92f85SJason Jin #define SYSMODE_PREFIX_ADDR 0x00000400 240ece92f85SJason Jin #define SYSMODE_INTR_PENDING 0x10000000 241ece92f85SJason Jin #define SYSMODE_EXTRN_INTR 0x20000000 242ece92f85SJason Jin #define SYSMODE_HALTED 0x40000000 243ece92f85SJason Jin 244ece92f85SJason Jin #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ 245ece92f85SJason Jin SYSMODE_SEGOVR_CS | \ 246ece92f85SJason Jin SYSMODE_SEGOVR_DS | \ 247ece92f85SJason Jin SYSMODE_SEGOVR_ES | \ 248ece92f85SJason Jin SYSMODE_SEGOVR_FS | \ 249ece92f85SJason Jin SYSMODE_SEGOVR_GS | \ 250ece92f85SJason Jin SYSMODE_SEGOVR_SS) 251ece92f85SJason Jin #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ 252ece92f85SJason Jin SYSMODE_SEGOVR_CS | \ 253ece92f85SJason Jin SYSMODE_SEGOVR_DS | \ 254ece92f85SJason Jin SYSMODE_SEGOVR_ES | \ 255ece92f85SJason Jin SYSMODE_SEGOVR_FS | \ 256ece92f85SJason Jin SYSMODE_SEGOVR_GS | \ 257ece92f85SJason Jin SYSMODE_SEGOVR_SS | \ 258ece92f85SJason Jin SYSMODE_PREFIX_DATA | \ 259ece92f85SJason Jin SYSMODE_PREFIX_ADDR) 260ece92f85SJason Jin 261ece92f85SJason Jin #define INTR_SYNCH 0x1 262ece92f85SJason Jin #define INTR_ASYNCH 0x2 263ece92f85SJason Jin #define INTR_HALTED 0x4 264ece92f85SJason Jin 265ece92f85SJason Jin typedef struct { 266ece92f85SJason Jin struct i386_general_regs gen; 267ece92f85SJason Jin struct i386_special_regs spc; 268ece92f85SJason Jin struct i386_segment_regs seg; 269ece92f85SJason Jin /* 270ece92f85SJason Jin * MODE contains information on: 271ece92f85SJason Jin * REPE prefix 2 bits repe,repne 272ece92f85SJason Jin * SEGMENT overrides 5 bits normal,DS,SS,CS,ES 273ece92f85SJason Jin * Delayed flag set 3 bits (zero, signed, parity) 274ece92f85SJason Jin * reserved 6 bits 275ece92f85SJason Jin * interrupt # 8 bits instruction raised interrupt 276ece92f85SJason Jin * BIOS video segregs 4 bits 277ece92f85SJason Jin * Interrupt Pending 1 bits 278ece92f85SJason Jin * Extern interrupt 1 bits 279ece92f85SJason Jin * Halted 1 bits 280ece92f85SJason Jin */ 281ece92f85SJason Jin long mode; 282ece92f85SJason Jin u8 intno; 283ece92f85SJason Jin volatile int intr; /* mask of pending interrupts */ 284ece92f85SJason Jin int debug; 285*b3521f2eSSimon Glass #ifdef CONFIG_X86EMU_DEBUG 286ece92f85SJason Jin int check; 287ece92f85SJason Jin u16 saved_ip; 288ece92f85SJason Jin u16 saved_cs; 289ece92f85SJason Jin int enc_pos; 290ece92f85SJason Jin int enc_str_pos; 291ece92f85SJason Jin char decode_buf[32]; /* encoded byte stream */ 292ece92f85SJason Jin char decoded_buf[256]; /* disassembled strings */ 293ece92f85SJason Jin #endif 294ece92f85SJason Jin } X86EMU_regs; 295ece92f85SJason Jin 296ece92f85SJason Jin /**************************************************************************** 297ece92f85SJason Jin REMARKS: 298ece92f85SJason Jin Structure maintaining the emulator machine state. 299ece92f85SJason Jin 300ece92f85SJason Jin MEMBERS: 301ece92f85SJason Jin x86 - X86 registers 302ece92f85SJason Jin mem_base - Base real mode memory for the emulator 303ece92f85SJason Jin mem_size - Size of the real mode memory block for the emulator 304ece92f85SJason Jin ****************************************************************************/ 305ece92f85SJason Jin #undef x86 306ece92f85SJason Jin typedef struct { 307ece92f85SJason Jin X86EMU_regs x86; 308ece92f85SJason Jin u8 *mem_base; 309ece92f85SJason Jin u32 mem_size; 310ece92f85SJason Jin void *private; 311ece92f85SJason Jin } X86EMU_sysEnv; 312ece92f85SJason Jin 313ece92f85SJason Jin #pragma pack() 314ece92f85SJason Jin 315ece92f85SJason Jin /*----------------------------- Global Variables --------------------------*/ 316ece92f85SJason Jin 317ece92f85SJason Jin #ifdef __cplusplus 318ece92f85SJason Jin extern "C" { /* Use "C" linkage when in C++ mode */ 319ece92f85SJason Jin #endif 320ece92f85SJason Jin 321ece92f85SJason Jin /* Global emulator machine state. 322ece92f85SJason Jin * 323ece92f85SJason Jin * We keep it global to avoid pointer dereferences in the code for speed. 324ece92f85SJason Jin */ 325ece92f85SJason Jin 326ece92f85SJason Jin extern X86EMU_sysEnv _X86EMU_env; 327ece92f85SJason Jin #define M _X86EMU_env 328ece92f85SJason Jin 329ece92f85SJason Jin /*-------------------------- Function Prototypes --------------------------*/ 330ece92f85SJason Jin 331ece92f85SJason Jin /* Function to log information at runtime */ 332ece92f85SJason Jin 333ece92f85SJason Jin #ifndef __KERNEL__ 334ece92f85SJason Jin void printk(const char *fmt, ...); 335ece92f85SJason Jin #endif 336ece92f85SJason Jin 337ece92f85SJason Jin #ifdef __cplusplus 338ece92f85SJason Jin } /* End of "C" linkage for C++ */ 339ece92f85SJason Jin #endif 340ece92f85SJason Jin #endif /* __X86EMU_REGS_H */ 341