xref: /openbmc/u-boot/drivers/adc/rockchip-saradc.c (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2ae3ed042SDavid Wu /*
3ae3ed042SDavid Wu  * (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd
4ae3ed042SDavid Wu  *
5ae3ed042SDavid Wu  * Rockchip SARADC driver for U-Boot
6ae3ed042SDavid Wu  */
7ae3ed042SDavid Wu 
8ae3ed042SDavid Wu #include <common.h>
9ae3ed042SDavid Wu #include <adc.h>
10ae3ed042SDavid Wu #include <clk.h>
11ae3ed042SDavid Wu #include <dm.h>
12ae3ed042SDavid Wu #include <errno.h>
13ae3ed042SDavid Wu #include <asm/io.h>
14ae3ed042SDavid Wu 
15ae3ed042SDavid Wu #define SARADC_CTRL_CHN_MASK		GENMASK(2, 0)
16ae3ed042SDavid Wu #define SARADC_CTRL_POWER_CTRL		BIT(3)
17ae3ed042SDavid Wu #define SARADC_CTRL_IRQ_ENABLE		BIT(5)
18ae3ed042SDavid Wu #define SARADC_CTRL_IRQ_STATUS		BIT(6)
19ae3ed042SDavid Wu 
20ae3ed042SDavid Wu #define SARADC_TIMEOUT			(100 * 1000)
21ae3ed042SDavid Wu 
22ae3ed042SDavid Wu struct rockchip_saradc_regs {
23ae3ed042SDavid Wu 	unsigned int data;
24ae3ed042SDavid Wu 	unsigned int stas;
25ae3ed042SDavid Wu 	unsigned int ctrl;
26ae3ed042SDavid Wu 	unsigned int dly_pu_soc;
27ae3ed042SDavid Wu };
28ae3ed042SDavid Wu 
29ae3ed042SDavid Wu struct rockchip_saradc_data {
30ae3ed042SDavid Wu 	int				num_bits;
31ae3ed042SDavid Wu 	int				num_channels;
32ae3ed042SDavid Wu 	unsigned long			clk_rate;
33ae3ed042SDavid Wu };
34ae3ed042SDavid Wu 
35ae3ed042SDavid Wu struct rockchip_saradc_priv {
36ae3ed042SDavid Wu 	struct rockchip_saradc_regs		*regs;
37ae3ed042SDavid Wu 	int					active_channel;
38ae3ed042SDavid Wu 	const struct rockchip_saradc_data	*data;
39ae3ed042SDavid Wu };
40ae3ed042SDavid Wu 
rockchip_saradc_channel_data(struct udevice * dev,int channel,unsigned int * data)41ae3ed042SDavid Wu int rockchip_saradc_channel_data(struct udevice *dev, int channel,
42ae3ed042SDavid Wu 				 unsigned int *data)
43ae3ed042SDavid Wu {
44ae3ed042SDavid Wu 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
45ae3ed042SDavid Wu 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
46ae3ed042SDavid Wu 
47ae3ed042SDavid Wu 	if (channel != priv->active_channel) {
489b643e31SMasahiro Yamada 		pr_err("Requested channel is not active!");
49ae3ed042SDavid Wu 		return -EINVAL;
50ae3ed042SDavid Wu 	}
51ae3ed042SDavid Wu 
52ae3ed042SDavid Wu 	if ((readl(&priv->regs->ctrl) & SARADC_CTRL_IRQ_STATUS) !=
53ae3ed042SDavid Wu 	    SARADC_CTRL_IRQ_STATUS)
54ae3ed042SDavid Wu 		return -EBUSY;
55ae3ed042SDavid Wu 
56ae3ed042SDavid Wu 	/* Read value */
57ae3ed042SDavid Wu 	*data = readl(&priv->regs->data);
58ae3ed042SDavid Wu 	*data &= uc_pdata->data_mask;
59ae3ed042SDavid Wu 
60ae3ed042SDavid Wu 	/* Power down adc */
61ae3ed042SDavid Wu 	writel(0, &priv->regs->ctrl);
62ae3ed042SDavid Wu 
63ae3ed042SDavid Wu 	return 0;
64ae3ed042SDavid Wu }
65ae3ed042SDavid Wu 
rockchip_saradc_start_channel(struct udevice * dev,int channel)66ae3ed042SDavid Wu int rockchip_saradc_start_channel(struct udevice *dev, int channel)
67ae3ed042SDavid Wu {
68ae3ed042SDavid Wu 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
69ae3ed042SDavid Wu 
70ae3ed042SDavid Wu 	if (channel < 0 || channel >= priv->data->num_channels) {
719b643e31SMasahiro Yamada 		pr_err("Requested channel is invalid!");
72ae3ed042SDavid Wu 		return -EINVAL;
73ae3ed042SDavid Wu 	}
74ae3ed042SDavid Wu 
75ae3ed042SDavid Wu 	/* 8 clock periods as delay between power up and start cmd */
76ae3ed042SDavid Wu 	writel(8, &priv->regs->dly_pu_soc);
77ae3ed042SDavid Wu 
78ae3ed042SDavid Wu 	/* Select the channel to be used and trigger conversion */
79ae3ed042SDavid Wu 	writel(SARADC_CTRL_POWER_CTRL | (channel & SARADC_CTRL_CHN_MASK) |
80ae3ed042SDavid Wu 	       SARADC_CTRL_IRQ_ENABLE, &priv->regs->ctrl);
81ae3ed042SDavid Wu 
82ae3ed042SDavid Wu 	priv->active_channel = channel;
83ae3ed042SDavid Wu 
84ae3ed042SDavid Wu 	return 0;
85ae3ed042SDavid Wu }
86ae3ed042SDavid Wu 
rockchip_saradc_stop(struct udevice * dev)87ae3ed042SDavid Wu int rockchip_saradc_stop(struct udevice *dev)
88ae3ed042SDavid Wu {
89ae3ed042SDavid Wu 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
90ae3ed042SDavid Wu 
91ae3ed042SDavid Wu 	/* Power down adc */
92ae3ed042SDavid Wu 	writel(0, &priv->regs->ctrl);
93ae3ed042SDavid Wu 
94ae3ed042SDavid Wu 	priv->active_channel = -1;
95ae3ed042SDavid Wu 
96ae3ed042SDavid Wu 	return 0;
97ae3ed042SDavid Wu }
98ae3ed042SDavid Wu 
rockchip_saradc_probe(struct udevice * dev)99ae3ed042SDavid Wu int rockchip_saradc_probe(struct udevice *dev)
100ae3ed042SDavid Wu {
101ae3ed042SDavid Wu 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
102ae3ed042SDavid Wu 	struct clk clk;
103ae3ed042SDavid Wu 	int ret;
104ae3ed042SDavid Wu 
105ae3ed042SDavid Wu 	ret = clk_get_by_index(dev, 0, &clk);
106ae3ed042SDavid Wu 	if (ret)
107ae3ed042SDavid Wu 		return ret;
108ae3ed042SDavid Wu 
109ae3ed042SDavid Wu 	ret = clk_set_rate(&clk, priv->data->clk_rate);
110ae3ed042SDavid Wu 	if (IS_ERR_VALUE(ret))
111ae3ed042SDavid Wu 		return ret;
112ae3ed042SDavid Wu 
113ae3ed042SDavid Wu 	priv->active_channel = -1;
114ae3ed042SDavid Wu 
115ae3ed042SDavid Wu 	return 0;
116ae3ed042SDavid Wu }
117ae3ed042SDavid Wu 
rockchip_saradc_ofdata_to_platdata(struct udevice * dev)118ae3ed042SDavid Wu int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
119ae3ed042SDavid Wu {
120ae3ed042SDavid Wu 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
121ae3ed042SDavid Wu 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
122ae3ed042SDavid Wu 	struct rockchip_saradc_data *data;
123ae3ed042SDavid Wu 
124ae3ed042SDavid Wu 	data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
125ae3ed042SDavid Wu 	priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
126ae3ed042SDavid Wu 	if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
1279b643e31SMasahiro Yamada 		pr_err("Dev: %s - can't get address!", dev->name);
128ae3ed042SDavid Wu 		return -ENODATA;
129ae3ed042SDavid Wu 	}
130ae3ed042SDavid Wu 
131ae3ed042SDavid Wu 	priv->data = data;
132ae3ed042SDavid Wu 	uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;;
133ae3ed042SDavid Wu 	uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
134ae3ed042SDavid Wu 	uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5;
135ae3ed042SDavid Wu 	uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1;
136ae3ed042SDavid Wu 
137ae3ed042SDavid Wu 	return 0;
138ae3ed042SDavid Wu }
139ae3ed042SDavid Wu 
140ae3ed042SDavid Wu static const struct adc_ops rockchip_saradc_ops = {
141ae3ed042SDavid Wu 	.start_channel = rockchip_saradc_start_channel,
142ae3ed042SDavid Wu 	.channel_data = rockchip_saradc_channel_data,
143ae3ed042SDavid Wu 	.stop = rockchip_saradc_stop,
144ae3ed042SDavid Wu };
145ae3ed042SDavid Wu 
146ae3ed042SDavid Wu static const struct rockchip_saradc_data saradc_data = {
147ae3ed042SDavid Wu 	.num_bits = 10,
148ae3ed042SDavid Wu 	.num_channels = 3,
149ae3ed042SDavid Wu 	.clk_rate = 1000000,
150ae3ed042SDavid Wu };
151ae3ed042SDavid Wu 
152ae3ed042SDavid Wu static const struct rockchip_saradc_data rk3066_tsadc_data = {
153ae3ed042SDavid Wu 	.num_bits = 12,
154ae3ed042SDavid Wu 	.num_channels = 2,
155ae3ed042SDavid Wu 	.clk_rate = 50000,
156ae3ed042SDavid Wu };
157ae3ed042SDavid Wu 
158ae3ed042SDavid Wu static const struct rockchip_saradc_data rk3399_saradc_data = {
159ae3ed042SDavid Wu 	.num_bits = 10,
160ae3ed042SDavid Wu 	.num_channels = 6,
161ae3ed042SDavid Wu 	.clk_rate = 1000000,
162ae3ed042SDavid Wu };
163ae3ed042SDavid Wu 
164ae3ed042SDavid Wu static const struct udevice_id rockchip_saradc_ids[] = {
165ae3ed042SDavid Wu 	{ .compatible = "rockchip,saradc",
166ae3ed042SDavid Wu 	  .data = (ulong)&saradc_data },
167ae3ed042SDavid Wu 	{ .compatible = "rockchip,rk3066-tsadc",
168ae3ed042SDavid Wu 	  .data = (ulong)&rk3066_tsadc_data },
169ae3ed042SDavid Wu 	{ .compatible = "rockchip,rk3399-saradc",
170ae3ed042SDavid Wu 	  .data = (ulong)&rk3399_saradc_data },
171ae3ed042SDavid Wu 	{ }
172ae3ed042SDavid Wu };
173ae3ed042SDavid Wu 
174ae3ed042SDavid Wu U_BOOT_DRIVER(rockchip_saradc) = {
175ae3ed042SDavid Wu 	.name		= "rockchip_saradc",
176ae3ed042SDavid Wu 	.id		= UCLASS_ADC,
177ae3ed042SDavid Wu 	.of_match	= rockchip_saradc_ids,
178ae3ed042SDavid Wu 	.ops		= &rockchip_saradc_ops,
179ae3ed042SDavid Wu 	.probe		= rockchip_saradc_probe,
180ae3ed042SDavid Wu 	.ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata,
181ae3ed042SDavid Wu 	.priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv),
182ae3ed042SDavid Wu };
183