1*eefe3e59SSimon GlassDisplay Controller 2*eefe3e59SSimon Glass------------------ 3*eefe3e59SSimon Glass 4*eefe3e59SSimon Glass(there isn't yet a generic binding in Linux, so this describes what is in 5*eefe3e59SSimon GlassU-Boot, and may change based on Linux activity) 6*eefe3e59SSimon Glass 7*eefe3e59SSimon GlassThe device node for a display device is as described in the document 8*eefe3e59SSimon Glass"Open Firmware Recommended Practice : Universal Serial Bus" with the 9*eefe3e59SSimon Glassfollowing modifications and additions : 10*eefe3e59SSimon Glass 11*eefe3e59SSimon GlassRequired properties : 12*eefe3e59SSimon Glass - compatible : Should be "nvidia,tegra20-dc" 13*eefe3e59SSimon Glass 14*eefe3e59SSimon GlassRequired subnode 'rgb' is as follows: 15*eefe3e59SSimon Glass 16*eefe3e59SSimon GlassRequired properties (rgb) : 17*eefe3e59SSimon Glass - nvidia,panel : phandle of LCD panel information 18*eefe3e59SSimon Glass 19*eefe3e59SSimon Glass 20*eefe3e59SSimon GlassThe panel node describes the panel itself. This has the properties listed in 21*eefe3e59SSimon Glassdisplaymode.txt as well as: 22*eefe3e59SSimon Glass 23*eefe3e59SSimon GlassRequired properties (panel) : 24*eefe3e59SSimon Glass - nvidia,bits-per-pixel: number of bits per pixel (depth) 25*eefe3e59SSimon Glass - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt) 26*eefe3e59SSimon Glass - nvidia,panel-timings: 4 cells containing required timings in ms: 27*eefe3e59SSimon Glass * delay before asserting panel_vdd 28*eefe3e59SSimon Glass * delay between panel_vdd-rise and data-rise 29*eefe3e59SSimon Glass * delay between data-rise and backlight_vdd-rise 30*eefe3e59SSimon Glass * delay between backlight_vdd and pwm-rise 31*eefe3e59SSimon Glass * delay between pwm-rise and backlight_en-rise 32*eefe3e59SSimon Glass 33*eefe3e59SSimon GlassOptional GPIO properies all have (phandle, GPIO number, flags): 34*eefe3e59SSimon Glass - nvidia,backlight-enable-gpios: backlight enable GPIO 35*eefe3e59SSimon Glass - nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO 36*eefe3e59SSimon Glass - nvidia,backlight-vdd-gpios: backlight power GPIO 37*eefe3e59SSimon Glass - nvidia,panel-vdd-gpios: panel power GPIO 38*eefe3e59SSimon Glass 39*eefe3e59SSimon GlassExample: 40*eefe3e59SSimon Glass 41*eefe3e59SSimon Glasshost1x { 42*eefe3e59SSimon Glass compatible = "nvidia,tegra20-host1x", "simple-bus"; 43*eefe3e59SSimon Glass reg = <0x50000000 0x00024000>; 44*eefe3e59SSimon Glass interrupts = <0 65 0x04 /* mpcore syncpt */ 45*eefe3e59SSimon Glass 0 67 0x04>; /* mpcore general */ 46*eefe3e59SSimon Glass 47*eefe3e59SSimon Glass #address-cells = <1>; 48*eefe3e59SSimon Glass #size-cells = <1>; 49*eefe3e59SSimon Glass status = "okay"; 50*eefe3e59SSimon Glass 51*eefe3e59SSimon Glass ranges = <0x54000000 0x54000000 0x04000000>; 52*eefe3e59SSimon Glass 53*eefe3e59SSimon Glass dc@54200000 { 54*eefe3e59SSimon Glass compatible = "nvidia,tegra20-dc"; 55*eefe3e59SSimon Glass reg = <0x54200000 0x00040000>; 56*eefe3e59SSimon Glass interrupts = <0 73 0x04>; 57*eefe3e59SSimon Glass status = "okay"; 58*eefe3e59SSimon Glass 59*eefe3e59SSimon Glass rgb { 60*eefe3e59SSimon Glass status = "okay"; 61*eefe3e59SSimon Glass nvidia,panel = <&lcd_panel>; 62*eefe3e59SSimon Glass }; 63*eefe3e59SSimon Glass }; 64*eefe3e59SSimon Glass}; 65*eefe3e59SSimon Glass 66*eefe3e59SSimon Glasslcd_panel: panel { 67*eefe3e59SSimon Glass /* Seaboard has 1366x768 */ 68*eefe3e59SSimon Glass clock = <70600000>; 69*eefe3e59SSimon Glass xres = <1366>; 70*eefe3e59SSimon Glass yres = <768>; 71*eefe3e59SSimon Glass left-margin = <58>; 72*eefe3e59SSimon Glass right-margin = <58>; 73*eefe3e59SSimon Glass hsync-len = <58>; 74*eefe3e59SSimon Glass lower-margin = <4>; 75*eefe3e59SSimon Glass upper-margin = <4>; 76*eefe3e59SSimon Glass vsync-len = <4>; 77*eefe3e59SSimon Glass hsync-active-high; 78*eefe3e59SSimon Glass nvidia,bits-per-pixel = <16>; 79*eefe3e59SSimon Glass nvidia,pwm = <&pwm 2 0>; 80*eefe3e59SSimon Glass nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */ 81*eefe3e59SSimon Glass nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ 82*eefe3e59SSimon Glass nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ 83*eefe3e59SSimon Glass nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */ 84*eefe3e59SSimon Glass nvidia,panel-timings = <400 4 203 17 15>; 85*eefe3e59SSimon Glass}; 86