xref: /openbmc/u-boot/doc/device-tree-bindings/serial/qca,ar9330-uart.txt (revision 08ca213acadef61748dc62d48b0f5c4bed8b8c2d) 
1*60b49761SWills Wang* Qualcomm Atheros AR9330 High-Speed UART
2*60b49761SWills Wang
3*60b49761SWills WangRequired properties:
4*60b49761SWills Wang
5*60b49761SWills Wang- compatible: Must be "qca,ar9330-uart"
6*60b49761SWills Wang
7*60b49761SWills Wang- reg: Specifies the physical base address of the controller and
8*60b49761SWills Wang  the length of the memory mapped region.
9*60b49761SWills Wang
10*60b49761SWills WangAdditional requirements:
11*60b49761SWills Wang
12*60b49761SWills Wang  Each UART port must have an alias correctly numbered in "aliases"
13*60b49761SWills Wang  node.
14*60b49761SWills Wang
15*60b49761SWills WangExample:
16*60b49761SWills Wang
17*60b49761SWills Wang	aliases {
18*60b49761SWills Wang		serial0 = &uart0;
19*60b49761SWills Wang	};
20*60b49761SWills Wang
21*60b49761SWills Wang	uart0: uart@18020000 {
22*60b49761SWills Wang		compatible = "qca,ar9330-uart";
23*60b49761SWills Wang		reg = <0x18020000 0x14>;
24*60b49761SWills Wang	};
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