1*96fa1e43SThomas Chou* Altera Triple-Speed Ethernet MAC driver (TSE) 2*96fa1e43SThomas Chou 3*96fa1e43SThomas ChouRequired properties: 4*96fa1e43SThomas Chou- compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should 5*96fa1e43SThomas Chou be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE. 6*96fa1e43SThomas Chou- reg: Address and length of the register set for the device. It contains 7*96fa1e43SThomas Chou the information of registers in the same order as described by reg-names 8*96fa1e43SThomas Chou- reg-names: Should contain the reg names 9*96fa1e43SThomas Chou "control_port": MAC configuration space region 10*96fa1e43SThomas Chou "tx_csr": xDMA Tx dispatcher control and status space region 11*96fa1e43SThomas Chou "tx_desc": MSGDMA Tx dispatcher descriptor space region 12*96fa1e43SThomas Chou "rx_csr" : xDMA Rx dispatcher control and status space region 13*96fa1e43SThomas Chou "rx_desc": MSGDMA Rx dispatcher descriptor space region 14*96fa1e43SThomas Chou "rx_resp": MSGDMA Rx dispatcher response space region 15*96fa1e43SThomas Chou "s1": SGDMA descriptor memory 16*96fa1e43SThomas Chou- interrupts: Should contain the TSE interrupts and it's mode. 17*96fa1e43SThomas Chou- interrupt-names: Should contain the interrupt names 18*96fa1e43SThomas Chou "rx_irq": xDMA Rx dispatcher interrupt 19*96fa1e43SThomas Chou "tx_irq": xDMA Tx dispatcher interrupt 20*96fa1e43SThomas Chou- rx-fifo-depth: MAC receive FIFO buffer depth in bytes 21*96fa1e43SThomas Chou- tx-fifo-depth: MAC transmit FIFO buffer depth in bytes 22*96fa1e43SThomas Chou- phy-mode: See ethernet.txt in the same directory. 23*96fa1e43SThomas Chou- phy-handle: See ethernet.txt in the same directory. 24*96fa1e43SThomas Chou- phy-addr: See ethernet.txt in the same directory. A configuration should 25*96fa1e43SThomas Chou include phy-handle or phy-addr. 26*96fa1e43SThomas Chou- altr,has-supplementary-unicast: 27*96fa1e43SThomas Chou If present, TSE supports additional unicast addresses. 28*96fa1e43SThomas Chou Otherwise additional unicast addresses are not supported. 29*96fa1e43SThomas Chou- altr,has-hash-multicast-filter: 30*96fa1e43SThomas Chou If present, TSE supports a hash based multicast filter. 31*96fa1e43SThomas Chou Otherwise, hash-based multicast filtering is not supported. 32*96fa1e43SThomas Chou 33*96fa1e43SThomas Chou- mdio device tree subnode: When the TSE has a phy connected to its local 34*96fa1e43SThomas Chou mdio, there must be device tree subnode with the following 35*96fa1e43SThomas Chou required properties: 36*96fa1e43SThomas Chou 37*96fa1e43SThomas Chou - compatible: Must be "altr,tse-mdio". 38*96fa1e43SThomas Chou - #address-cells: Must be <1>. 39*96fa1e43SThomas Chou - #size-cells: Must be <0>. 40*96fa1e43SThomas Chou 41*96fa1e43SThomas Chou For each phy on the mdio bus, there must be a node with the following 42*96fa1e43SThomas Chou fields: 43*96fa1e43SThomas Chou 44*96fa1e43SThomas Chou - reg: phy id used to communicate to phy. 45*96fa1e43SThomas Chou - device_type: Must be "ethernet-phy". 46*96fa1e43SThomas Chou 47*96fa1e43SThomas ChouOptional properties: 48*96fa1e43SThomas Chou- local-mac-address: See ethernet.txt in the same directory. 49*96fa1e43SThomas Chou- max-frame-size: See ethernet.txt in the same directory. 50*96fa1e43SThomas Chou 51*96fa1e43SThomas ChouExample: 52*96fa1e43SThomas Chou 53*96fa1e43SThomas Chou tse_sub_0_eth_tse_0: ethernet@0x1,00000000 { 54*96fa1e43SThomas Chou compatible = "altr,tse-msgdma-1.0"; 55*96fa1e43SThomas Chou reg = <0x00000001 0x00000000 0x00000400>, 56*96fa1e43SThomas Chou <0x00000001 0x00000460 0x00000020>, 57*96fa1e43SThomas Chou <0x00000001 0x00000480 0x00000020>, 58*96fa1e43SThomas Chou <0x00000001 0x000004A0 0x00000008>, 59*96fa1e43SThomas Chou <0x00000001 0x00000400 0x00000020>, 60*96fa1e43SThomas Chou <0x00000001 0x00000420 0x00000020>; 61*96fa1e43SThomas Chou reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; 62*96fa1e43SThomas Chou interrupt-parent = <&hps_0_arm_gic_0>; 63*96fa1e43SThomas Chou interrupts = <0 41 4>, <0 40 4>; 64*96fa1e43SThomas Chou interrupt-names = "rx_irq", "tx_irq"; 65*96fa1e43SThomas Chou rx-fifo-depth = <2048>; 66*96fa1e43SThomas Chou tx-fifo-depth = <2048>; 67*96fa1e43SThomas Chou address-bits = <48>; 68*96fa1e43SThomas Chou max-frame-size = <1500>; 69*96fa1e43SThomas Chou local-mac-address = [ 00 00 00 00 00 00 ]; 70*96fa1e43SThomas Chou phy-mode = "gmii"; 71*96fa1e43SThomas Chou altr,has-supplementary-unicast; 72*96fa1e43SThomas Chou altr,has-hash-multicast-filter; 73*96fa1e43SThomas Chou phy-handle = <&phy0>; 74*96fa1e43SThomas Chou mdio { 75*96fa1e43SThomas Chou compatible = "altr,tse-mdio"; 76*96fa1e43SThomas Chou #address-cells = <1>; 77*96fa1e43SThomas Chou #size-cells = <0>; 78*96fa1e43SThomas Chou phy0: ethernet-phy@0 { 79*96fa1e43SThomas Chou reg = <0x0>; 80*96fa1e43SThomas Chou device_type = "ethernet-phy"; 81*96fa1e43SThomas Chou }; 82*96fa1e43SThomas Chou 83*96fa1e43SThomas Chou phy1: ethernet-phy@1 { 84*96fa1e43SThomas Chou reg = <0x1>; 85*96fa1e43SThomas Chou device_type = "ethernet-phy"; 86*96fa1e43SThomas Chou }; 87*96fa1e43SThomas Chou 88*96fa1e43SThomas Chou }; 89*96fa1e43SThomas Chou }; 90*96fa1e43SThomas Chou 91*96fa1e43SThomas Chou tse_sub_1_eth_tse_0: ethernet@0x1,00001000 { 92*96fa1e43SThomas Chou compatible = "altr,tse-msgdma-1.0"; 93*96fa1e43SThomas Chou reg = <0x00000001 0x00001000 0x00000400>, 94*96fa1e43SThomas Chou <0x00000001 0x00001460 0x00000020>, 95*96fa1e43SThomas Chou <0x00000001 0x00001480 0x00000020>, 96*96fa1e43SThomas Chou <0x00000001 0x000014A0 0x00000008>, 97*96fa1e43SThomas Chou <0x00000001 0x00001400 0x00000020>, 98*96fa1e43SThomas Chou <0x00000001 0x00001420 0x00000020>; 99*96fa1e43SThomas Chou reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; 100*96fa1e43SThomas Chou interrupt-parent = <&hps_0_arm_gic_0>; 101*96fa1e43SThomas Chou interrupts = <0 43 4>, <0 42 4>; 102*96fa1e43SThomas Chou interrupt-names = "rx_irq", "tx_irq"; 103*96fa1e43SThomas Chou rx-fifo-depth = <2048>; 104*96fa1e43SThomas Chou tx-fifo-depth = <2048>; 105*96fa1e43SThomas Chou address-bits = <48>; 106*96fa1e43SThomas Chou max-frame-size = <1500>; 107*96fa1e43SThomas Chou local-mac-address = [ 00 00 00 00 00 00 ]; 108*96fa1e43SThomas Chou phy-mode = "gmii"; 109*96fa1e43SThomas Chou altr,has-supplementary-unicast; 110*96fa1e43SThomas Chou altr,has-hash-multicast-filter; 111*96fa1e43SThomas Chou phy-handle = <&phy1>; 112*96fa1e43SThomas Chou }; 113