1f3b84a30SAndrew BradfordIntel Bay Trail FSP UPD Binding 2f3b84a30SAndrew Bradford=============================== 3f3b84a30SAndrew Bradford 4f3b84a30SAndrew BradfordThe device tree node which describes the overriding of the Intel Bay Trail FSP 5f3b84a30SAndrew BradfordUPD data for configuring the SoC. 6f3b84a30SAndrew Bradford 7f3b84a30SAndrew BradfordAll properties can be found within the `upd-region` struct in 8f3b84a30SAndrew Bradfordarch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in 95e74e5a6SBin MengIntel's FSP Binary Configuration Tool for Bay Trail. This list of properties 105e74e5a6SBin Mengis matched up to Intel's E3800 FSPv4 release. 11f3b84a30SAndrew Bradford 12f3b84a30SAndrew Bradford# Boolean properties: 13f3b84a30SAndrew Bradford 14f3b84a30SAndrew Bradford- fsp,enable-sdio 15f3b84a30SAndrew Bradford- fsp,enable-sdcard 16f3b84a30SAndrew Bradford- fsp,enable-hsuart0 17f3b84a30SAndrew Bradford- fsp,enable-hsuart1 18f3b84a30SAndrew Bradford- fsp,enable-spi 19f3b84a30SAndrew Bradford- fsp,enable-sata 20f3b84a30SAndrew Bradford- fsp,enable-azalia 21f3b84a30SAndrew Bradford- fsp,enable-xhci 22f3b84a30SAndrew Bradford- fsp,enable-dma0 23f3b84a30SAndrew Bradford- fsp,enable-dma1 24f3b84a30SAndrew Bradford- fsp,enable-i2-c0 25f3b84a30SAndrew Bradford- fsp,enable-i2-c1 26f3b84a30SAndrew Bradford- fsp,enable-i2-c2 27f3b84a30SAndrew Bradford- fsp,enable-i2-c3 28f3b84a30SAndrew Bradford- fsp,enable-i2-c4 29f3b84a30SAndrew Bradford- fsp,enable-i2-c5 30f3b84a30SAndrew Bradford- fsp,enable-i2-c6 31f3b84a30SAndrew Bradford- fsp,enable-pwm0 32f3b84a30SAndrew Bradford- fsp,enable-pwm1 33f3b84a30SAndrew Bradford- fsp,enable-hsi 34f3b84a30SAndrew Bradford- fsp,mrc-debug-msg 35f3b84a30SAndrew Bradford- fsp,isp-enable 36f3b84a30SAndrew Bradford- fsp,igd-render-standby 37f3b84a30SAndrew Bradford- fsp,txe-uma-enable 38f3b84a30SAndrew Bradford- fsp,emmc45-ddr50-enabled 39f3b84a30SAndrew Bradford- fsp,emmc45-hs200-enabled 40f3b84a30SAndrew Bradford- fsp,enable-igd 41f3b84a30SAndrew Bradford- fsp,enable-memory-down 42f3b84a30SAndrew Bradford 43f3b84a30SAndrew BradfordIf you set "fsp,enable-memory-down" you are strongly encouraged to provide an 445e74e5a6SBin Meng"fsp,memory-down-params{};" to specify how your memory is configured. If you 455e74e5a6SBin Mengdo not set "fsp,enable-memory-down", then the DIMM SPD information will be 46f3b84a30SAndrew Bradforddiscovered by the FSP and used to setup main memory. 47f3b84a30SAndrew Bradford 48f3b84a30SAndrew Bradford 49f3b84a30SAndrew Bradford# Integer properties: 50f3b84a30SAndrew Bradford 51f3b84a30SAndrew Bradford- fsp,mrc-init-tseg-size 52f3b84a30SAndrew Bradford- fsp,mrc-init-mmio-size 53f3b84a30SAndrew Bradford- fsp,mrc-init-spd-addr1 54f3b84a30SAndrew Bradford- fsp,mrc-init-spd-addr2 55f3b84a30SAndrew Bradford- fsp,emmc-boot-mode 56f3b84a30SAndrew Bradford- fsp,sata-mode 57*f8f291b0SBin Meng- fsp,lpe-mode 58*f8f291b0SBin Meng- fsp,lpss-sio-mode 59f3b84a30SAndrew Bradford- fsp,igd-dvmt50-pre-alloc 60f3b84a30SAndrew Bradford- fsp,aperture-size 61f3b84a30SAndrew Bradford- fsp,gtt-size 62*f8f291b0SBin Meng- fsp,scc-mode 63f3b84a30SAndrew Bradford- fsp,os-selection 64f3b84a30SAndrew Bradford- fsp,emmc45-retune-timer-value 65f3b84a30SAndrew Bradford 66f3b84a30SAndrew Bradford- fsp,memory-down-params { 67f3b84a30SAndrew Bradford 68f3b84a30SAndrew Bradford # Boolean properties: 69f3b84a30SAndrew Bradford 70f3b84a30SAndrew Bradford - fsp,dimm-0-enable 71f3b84a30SAndrew Bradford - fsp,dimm-1-enable 72f3b84a30SAndrew Bradford 73f3b84a30SAndrew Bradford # Integer properties: 74f3b84a30SAndrew Bradford 755e74e5a6SBin Meng - fsp,dram-speed 76f3b84a30SAndrew Bradford - fsp,dram-type 77f3b84a30SAndrew Bradford - fsp,dimm-width 78f3b84a30SAndrew Bradford - fsp,dimm-density 79f3b84a30SAndrew Bradford - fsp,dimm-bus-width 80f3b84a30SAndrew Bradford - fsp,dimm-sides 81f3b84a30SAndrew Bradford - fsp,dimm-tcl 82f3b84a30SAndrew Bradford - fsp,dimm-trpt-rcd 83f3b84a30SAndrew Bradford - fsp,dimm-twr 84f3b84a30SAndrew Bradford - fsp,dimm-twtr 85f3b84a30SAndrew Bradford - fsp,dimm-trrd 86f3b84a30SAndrew Bradford - fsp,dimm-trtp 87f3b84a30SAndrew Bradford - fsp,dimm-tfaw 88f3b84a30SAndrew Bradford}; 89f3b84a30SAndrew Bradford 905e74e5a6SBin MengFor all integer properties, available options are listed in fsp_configs.h in 915e74e5a6SBin Mengarch/x86/include/asm/arch-baytrail/fsp directory (eg: MRC_INIT_TSEG_SIZE_1MB). 925e74e5a6SBin Meng 93f3b84a30SAndrew Bradford 94f3b84a30SAndrew BradfordExample (from MinnowMax Dual Core): 95f3b84a30SAndrew Bradford----------------------------------- 96f3b84a30SAndrew Bradford 97f3b84a30SAndrew Bradford/ { 98f3b84a30SAndrew Bradford ... 99f3b84a30SAndrew Bradford 100f3b84a30SAndrew Bradford fsp { 101f3b84a30SAndrew Bradford compatible = "intel,baytrail-fsp"; 1025e74e5a6SBin Meng fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>; 1035e74e5a6SBin Meng fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>; 104f3b84a30SAndrew Bradford fsp,mrc-init-spd-addr1 = <0xa0>; 105f3b84a30SAndrew Bradford fsp,mrc-init-spd-addr2 = <0xa2>; 1065e74e5a6SBin Meng fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>; 107f3b84a30SAndrew Bradford fsp,enable-sdio; 108f3b84a30SAndrew Bradford fsp,enable-sdcard; 109f3b84a30SAndrew Bradford fsp,enable-hsuart1; 110f3b84a30SAndrew Bradford fsp,enable-spi; 111f3b84a30SAndrew Bradford fsp,enable-sata; 1125e74e5a6SBin Meng fsp,sata-mode = <SATA_MODE_AHCI>; 113*f8f291b0SBin Meng fsp,lpe-mode = <LPE_MODE_PCI>; 114*f8f291b0SBin Meng fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>; 115f3b84a30SAndrew Bradford fsp,enable-dma0; 116f3b84a30SAndrew Bradford fsp,enable-dma1; 117f3b84a30SAndrew Bradford fsp,enable-i2c0; 118f3b84a30SAndrew Bradford fsp,enable-i2c1; 119f3b84a30SAndrew Bradford fsp,enable-i2c2; 120f3b84a30SAndrew Bradford fsp,enable-i2c3; 121f3b84a30SAndrew Bradford fsp,enable-i2c4; 122f3b84a30SAndrew Bradford fsp,enable-i2c5; 123f3b84a30SAndrew Bradford fsp,enable-i2c6; 124f3b84a30SAndrew Bradford fsp,enable-pwm0; 125f3b84a30SAndrew Bradford fsp,enable-pwm1; 1265e74e5a6SBin Meng fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>; 1275e74e5a6SBin Meng fsp,aperture-size = <APERTURE_SIZE_256MB>; 1285e74e5a6SBin Meng fsp,gtt-size = <GTT_SIZE_2MB>; 129*f8f291b0SBin Meng fsp,scc-mode = <SCC_MODE_PCI>; 1305e74e5a6SBin Meng fsp,os-selection = <OS_SELECTION_LINUX>; 131f3b84a30SAndrew Bradford fsp,emmc45-ddr50-enabled; 132f3b84a30SAndrew Bradford fsp,emmc45-retune-timer-value = <8>; 133f3b84a30SAndrew Bradford fsp,enable-igd; 134f3b84a30SAndrew Bradford fsp,enable-memory-down; 135f3b84a30SAndrew Bradford fsp,memory-down-params { 136f3b84a30SAndrew Bradford compatible = "intel,baytrail-fsp-mdp"; 1375e74e5a6SBin Meng fsp,dram-speed = <DRAM_SPEED_1066MTS>; 1385e74e5a6SBin Meng fsp,dram-type = <DRAM_TYPE_DDR3L>; 139f3b84a30SAndrew Bradford fsp,dimm-0-enable; 1405e74e5a6SBin Meng fsp,dimm-width = <DIMM_WIDTH_X16>; 1415e74e5a6SBin Meng fsp,dimm-density = <DIMM_DENSITY_4GBIT>; 1425e74e5a6SBin Meng fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>; 1435e74e5a6SBin Meng fsp,dimm-sides = <DIMM_SIDES_1RANKS>; 144f3b84a30SAndrew Bradford fsp,dimm-tcl = <0xb>; 145f3b84a30SAndrew Bradford fsp,dimm-trpt-rcd = <0xb>; 146f3b84a30SAndrew Bradford fsp,dimm-twr = <0xc>; 147f3b84a30SAndrew Bradford fsp,dimm-twtr = <6>; 148f3b84a30SAndrew Bradford fsp,dimm-trrd = <6>; 149f3b84a30SAndrew Bradford fsp,dimm-trtp = <6>; 150f3b84a30SAndrew Bradford fsp,dimm-tfaw = <0x14>; 151f3b84a30SAndrew Bradford }; 152f3b84a30SAndrew Bradford }; 153f3b84a30SAndrew Bradford 154f3b84a30SAndrew Bradford ... 155f3b84a30SAndrew Bradford}; 156