1ffdb20beSMike FrysingerSandbox SPI/SPI Flash Implementation 2ffdb20beSMike Frysinger==================================== 3ffdb20beSMike Frysinger 4*1cc0a9f4SRobert P. J. DayU-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled 5ffdb20beSMike Frysingerusing the --spi_sf paramter when starting U-Boot. 6ffdb20beSMike Frysinger 7ffdb20beSMike FrysingerFor example: 8ffdb20beSMike Frysinger 9ffdb20beSMike Frysinger$ make O=sandbox sandbox_config 10ffdb20beSMike Frysinger$ make O=sandbox 11ffdb20beSMike Frysinger$ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin 12ffdb20beSMike Frysinger 13ffdb20beSMike FrysingerThe four parameters to spi_sf are: 14ffdb20beSMike Frysinger 15ffdb20beSMike Frysinger SPI bus number (typically 0) 16ffdb20beSMike Frysinger SPI chip select number (typically 0) 17ffdb20beSMike Frysinger SPI chip to emulate 18ffdb20beSMike Frysinger File containing emulated data 19ffdb20beSMike Frysinger 20ffdb20beSMike FrysingerSupported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once 21ffdb20beSMike FrysingerU-Boot it started you can use 'sf' commands as normal. For example: 22ffdb20beSMike Frysinger 23ffdb20beSMike Frysinger$ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \ 24ffdb20beSMike Frysinger -c "sf probe; sf test 0 100000; sf read 0 1000 1000; \ 25ffdb20beSMike Frysinger sf erase 1000 1000; sf write 0 1000 1000" 26ffdb20beSMike Frysinger 27ffdb20beSMike Frysinger 28ffdb20beSMike FrysingerU-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15) 29ffdb20beSMike Frysinger 30ffdb20beSMike FrysingerDRAM: 128 MiB 31ffdb20beSMike FrysingerUsing default environment 32ffdb20beSMike Frysinger 33ffdb20beSMike FrysingerIn: serial 34ffdb20beSMike FrysingerOut: serial 35ffdb20beSMike FrysingerErr: serial 36ffdb20beSMike FrysingerSF: Detected W25Q128BV with page size 256 Bytes, erase size 4 KiB, total 16 MiB 37ffdb20beSMike FrysingerSPI flash test: 38ffdb20beSMike Frysinger0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps 39ffdb20beSMike Frysinger1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps 40ffdb20beSMike Frysinger2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps 41ffdb20beSMike Frysinger3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps 42ffdb20beSMike FrysingerTest passed 43ffdb20beSMike Frysinger0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps 44ffdb20beSMike Frysinger1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps 45ffdb20beSMike Frysinger2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps 46ffdb20beSMike Frysinger3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps 47ffdb20beSMike FrysingerSF: 4096 bytes @ 0x1000 Read: OK 48ffdb20beSMike FrysingerSF: 4096 bytes @ 0x1000 Erased: OK 49ffdb20beSMike FrysingerSF: 4096 bytes @ 0x1000 Written: OK 50ffdb20beSMike Frysinger 51ffdb20beSMike Frysinger 52ffdb20beSMike FrysingerSince the SPI bus is fully implemented as well as the SPI flash connected to 53ffdb20beSMike Frysingerit, you can also use low-level SPI commands to access the flash. For example 54ffdb20beSMike Frysingerthis reads the device ID from the emulated chip: 55ffdb20beSMike Frysinger 56ffdb20beSMike Frysinger=> sspi 0 32 9f 57ffdb20beSMike FrysingerFFEF4018 58ffdb20beSMike Frysinger 59ffdb20beSMike Frysinger 60ffdb20beSMike FrysingerSimon Glass 61ffdb20beSMike Frysingersjg@chromium.org 62ffdb20beSMike Frysinger7/11/2013 63ffdb20beSMike FrysingerNote that the sandbox SPI implementation was written by Mike Frysinger 64ffdb20beSMike Frysinger<vapier@gentoo.org>. 65