1bf9e3b38Swdenk 2*6ba2da90SAngelo DureghelloU-Boot for Motorola (or Freescale/NXP) ColdFire processors 3bf9e3b38Swdenk 4*6ba2da90SAngelo Dureghello=============================================================================== 59acb626fSHeiko SchocherHistory 69acb626fSHeiko Schocher 7*6ba2da90SAngelo DureghelloNovember 02, 2017 Angelo Dureghello <angelo@sysam.it> 8*6ba2da90SAngelo DureghelloAugust 08, 2005 Jens Scharsig <esw@bus-elektronik.de> 99acb626fSHeiko Schocher MCF5282 implementation without preloader 10*6ba2da90SAngelo DureghelloJanuary 12, 2004 <josef.baumgartner@telex.de> 11*6ba2da90SAngelo Dureghello=============================================================================== 12*6ba2da90SAngelo Dureghello 13bf9e3b38Swdenk 14bf9e3b38SwdenkThis file contains status information for the port of U-Boot to the 15*6ba2da90SAngelo DureghelloMotorola ColdFire series of CPUs. 16bf9e3b38Swdenk 17bf9e3b38Swdenk 18*6ba2da90SAngelo Dureghello1. Overview 19bf9e3b38Swdenk 20*6ba2da90SAngelo DureghelloThe ColdFire instruction set is "assembly source" compatible but an evolution 21*6ba2da90SAngelo Dureghelloof the original 68000 instruction set. Some not much used instructions has 22*6ba2da90SAngelo Dureghellobeen removed. The instructions are only 16, 32, or 48 bits long, a 23*6ba2da90SAngelo Dureghellosimplification compared to the 68000 series. 24*6ba2da90SAngelo Dureghello 25*6ba2da90SAngelo DureghelloBernhard Kuhn ported U-Boot 0.4.0 to the Motorola ColdFire architecture. 26*6ba2da90SAngelo DureghelloThe patches of Bernhard support the MCF5272 and MCF5282. A great disadvantage 27*6ba2da90SAngelo Dureghelloof these patches was that they needed a pre-bootloader to start U-Boot. 28*6ba2da90SAngelo DureghelloBecause of this, a new port was created which no longer needs a first stage 29*6ba2da90SAngelo Dureghellobooter. 30*6ba2da90SAngelo Dureghello 31*6ba2da90SAngelo DureghelloThanks mainly to Freescale but also to several other contributors, U-Boot now 32*6ba2da90SAngelo Dureghellosupports nearly the entire range of ColdFire processors and their related 33*6ba2da90SAngelo Dureghellodevelopment boards. 34bf9e3b38Swdenk 35bf9e3b38Swdenk 36*6ba2da90SAngelo Dureghello2. Supported CPU families 37bf9e3b38Swdenk 38*6ba2da90SAngelo DureghelloPlease "make menuconfig" with ARCH=m68k, or check arch/m68k/cpu to see the 39*6ba2da90SAngelo Dureghellocurrently supported processor and families. 40bf9e3b38Swdenk 41bf9e3b38Swdenk 42*6ba2da90SAngelo Dureghello3. Supported boards 43bf9e3b38Swdenk 44*6ba2da90SAngelo DureghelloU-Boot supports actually more than 40 ColdFire based boards. 45*6ba2da90SAngelo DureghelloBoard configuration can be done trough include/configs/<boardname>.h but the 46*6ba2da90SAngelo Dureghellocurrent recommended method is to use the new and more friendly approach as 47*6ba2da90SAngelo Dureghellothe "make menuconfig" way, very similar to the Linux way. 48bf9e3b38Swdenk 49*6ba2da90SAngelo DureghelloTo know details as memory map, build targets, default setup, etc, of a 50*6ba2da90SAngelo Dureghellospecific board please check: 51bf9e3b38Swdenk 52*6ba2da90SAngelo Dureghelloinclude/configs/<boardname>.h 53*6ba2da90SAngelo Dureghelloand/or 54*6ba2da90SAngelo Dureghelloconfigs/<boardname>_defconfig 55*6ba2da90SAngelo Dureghello 56*6ba2da90SAngelo DureghelloIt is possible to build all ColdFire boards in a single command-line command, 57*6ba2da90SAngelo Dureghellofrom u-boot root directory, as: 58*6ba2da90SAngelo Dureghello 59*6ba2da90SAngelo Dureghello./tools/buildman/buildman m68k 60bf9e3b38Swdenk 61bf9e3b38Swdenk 62*6ba2da90SAngelo Dureghello3.1. Build U-Boot for a specific board 63bf9e3b38Swdenk 64*6ba2da90SAngelo DureghelloA bash script similar to the one below may be used: 65bf9e3b38Swdenk 66*6ba2da90SAngelo Dureghello#!/bin/bash 679acb626fSHeiko Schocher 68*6ba2da90SAngelo Dureghelloexport CROSS_COMPILE=/opt/toolchains/m68k/gcc-4.9.0-nolibc/bin/m68k-linux- 699acb626fSHeiko Schocher 70*6ba2da90SAngelo Dureghelloboard=M5475DFE 719acb626fSHeiko Schocher 72*6ba2da90SAngelo Dureghellomake distclean 73*6ba2da90SAngelo Dureghellomake ARCH=m68k ${board}_defconfig 74*6ba2da90SAngelo Dureghellomake ARCH=m68k KBUILD_VERBOSE=1 759acb626fSHeiko Schocher 76bf9e3b38Swdenk 77*6ba2da90SAngelo Dureghello4. Adopted toolchains 78bf9e3b38Swdenk 79*6ba2da90SAngelo DureghelloPlease check: 80*6ba2da90SAngelo Dureghellohttps://www.denx.de/wiki/U-Boot/ColdFireNotes 81*6ba2da90SAngelo Dureghello 82*6ba2da90SAngelo Dureghello 83*6ba2da90SAngelo Dureghello5. ColdFire specific configuration options/settings 84*6ba2da90SAngelo Dureghello 85*6ba2da90SAngelo Dureghello 86*6ba2da90SAngelo Dureghello5.1. Configuration to use a pre-loader 87*6ba2da90SAngelo Dureghello 88a187559eSBin MengIf U-Boot should be loaded to RAM and started by a pre-loader 89bf9e3b38SwdenkCONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the 90bf9e3b38Swdenkinitial vector table and basic processor initialization will not 91a187559eSBin Mengbe compiled in. The start address of U-Boot must be adjusted in 926d0f6bcfSJean-Christophe PLAGNIOL-VILLARDthe boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile 9314d0a02aSWolfgang Denk(CONFIG_SYS_TEXT_BASE) to the load address. 94bf9e3b38Swdenk 95*6ba2da90SAngelo Dureghello 96*6ba2da90SAngelo Dureghello5.2 ColdFire CPU specific options/settings 97*6ba2da90SAngelo Dureghello 98*6ba2da90SAngelo DureghelloTo specify a CPU model, some defines shoudl be used, i.e.: 99bf9e3b38Swdenk 100bf9e3b38SwdenkCONFIG_MCF52x2 -- defined for all MCF52x2 CPUs 101bf9e3b38SwdenkCONFIG_M5272 -- defined for all Motorola MCF5272 CPUs 102bf9e3b38Swdenk 103*6ba2da90SAngelo DureghelloOther options, generally set inside include/configs/<boardname>.h, they may 104*6ba2da90SAngelo Dureghelloapply to one or more cpu for the ColdFire family: 105bf9e3b38Swdenk 106*6ba2da90SAngelo DureghelloCONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration 107*6ba2da90SAngelo Dureghello registers 1086d0f6bcfSJean-Christophe PLAGNIOL-VILLARDCONFIG_SYS_ENET_BD_BASE 10916263087SMike Williams -- defines the base address of the FEC buffer descriptors 1106d0f6bcfSJean-Christophe PLAGNIOL-VILLARDCONFIG_SYS_SCR -- defines the contents of the System Configuration Register 1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARDCONFIG_SYS_SPR -- defines the contents of the System Protection Register 112*6ba2da90SAngelo DureghelloCONFIG_SYS_MFD -- defines the PLL Multiplication Factor Divider 1139acb626fSHeiko Schocher (see table 9-4 of MCF user manual) 114*6ba2da90SAngelo DureghelloCONFIG_SYS_RFD -- defines the PLL Reduce Frequency Devider 1159acb626fSHeiko Schocher (see table 9-4 of MCF user manual) 116*6ba2da90SAngelo DureghelloCONFIG_SYS_CSx_BASE 117*6ba2da90SAngelo Dureghello -- defines the base address of chip select x 118*6ba2da90SAngelo DureghelloCONFIG_SYS_CSx_SIZE 119*6ba2da90SAngelo Dureghello -- defines the memory size (address range) of chip select x 120*6ba2da90SAngelo DureghelloCONFIG_SYS_CSx_WIDTH 121*6ba2da90SAngelo Dureghello -- defines the bus with of chip select x 122*6ba2da90SAngelo DureghelloCONFIG_SYS_CSx_MASK 123*6ba2da90SAngelo Dureghello -- defines the mask for the related chip select x 124*6ba2da90SAngelo DureghelloCONFIG_SYS_CSx_RO 125*6ba2da90SAngelo Dureghello -- if set to 0 chip select x is read/write else chip select 126*6ba2da90SAngelo Dureghello is read only 127*6ba2da90SAngelo DureghelloCONFIG_SYS_CSx_WS 128*6ba2da90SAngelo Dureghello -- defines the number of wait states of chip select x 129*6ba2da90SAngelo DureghelloCONFIG_SYS_CACHE_ICACR 130*6ba2da90SAngelo DureghelloCONFIG_SYS_CACHE_DCACR 131*6ba2da90SAngelo DureghelloCONFIG_SYS_CACHE_ACRX 132*6ba2da90SAngelo Dureghello -- cache-related registers config 133*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_BASE 134*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_SIZE 135*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_BASEX 136*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_CFG1 137*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_CFG2 138*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_CTRL 139*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_MODE 140*6ba2da90SAngelo DureghelloCONFIG_SYS_SDRAM_EMOD 141*6ba2da90SAngelo Dureghello -- SDRAM config for SDRAM controller-specific registers, please 142*6ba2da90SAngelo Dureghello see arch/m68k/cpu/<specific_cpu>/start.S files to see how 143*6ba2da90SAngelo Dureghello these options are used. 144*6ba2da90SAngelo DureghelloCONFIG_MCFUART 145*6ba2da90SAngelo Dureghello -- defines enabling of ColdFire UART driver 146*6ba2da90SAngelo DureghelloCONFIG_SYS_UART_PORT 147*6ba2da90SAngelo Dureghello -- defines the UART port to be used (only a single UART can be 148*6ba2da90SAngelo Dureghello actually enabled) 149*6ba2da90SAngelo DureghelloCONFIG_SYS_SBFHDR_SIZE 150*6ba2da90SAngelo Dureghello -- size of the prepended SBF header, if any 151