xref: /openbmc/u-boot/doc/README.NDS32 (revision afc1ce82885698c61946c0cab99aac3547ef78ea)
1*afc1ce82SMacpaul LinNDS32 is a new high-performance 32-bit RISC microprocessor core.
2*afc1ce82SMacpaul Lin
3*afc1ce82SMacpaul Linhttp://www.andestech.com/
4*afc1ce82SMacpaul Lin
5*afc1ce82SMacpaul LinAndeStar ISA
6*afc1ce82SMacpaul Lin============
7*afc1ce82SMacpaul LinAndeStar is a patent-pending 16-bit/32-bit mixed-length instruction set to
8*afc1ce82SMacpaul Linachieve optimal system performance, code density, and power efficiency.
9*afc1ce82SMacpaul Lin
10*afc1ce82SMacpaul LinIt contains the following features:
11*afc1ce82SMacpaul Lin - Intermixable 32-bit and 16-bit instruction sets without the need for
12*afc1ce82SMacpaul Lin   mode switch.
13*afc1ce82SMacpaul Lin - 16-bit instructions as a frequently used subset of 32-bit instructions.
14*afc1ce82SMacpaul Lin - RISC-style register-based instruction set.
15*afc1ce82SMacpaul Lin - 32 32-bit General Purpose Registers (GPR).
16*afc1ce82SMacpaul Lin - Upto 1024 User Special Registers (USR) for existing and extension
17*afc1ce82SMacpaul Lin   instructions.
18*afc1ce82SMacpaul Lin - Rich load/store instructions for...
19*afc1ce82SMacpaul Lin   - Single memory access with base address update.
20*afc1ce82SMacpaul Lin   - Multiple aligned and unaligned memory accesses for memory copy and stack
21*afc1ce82SMacpaul Lin     operations.
22*afc1ce82SMacpaul Lin   - Data prefetch to improve data cache performance.
23*afc1ce82SMacpaul Lin   - Non-bus locking synchronization instructions.
24*afc1ce82SMacpaul Lin - PC relative jump and PC read instructions for efficient position independent
25*afc1ce82SMacpaul Lin   code.
26*afc1ce82SMacpaul Lin - Multiply-add and multiple-sub with 64-bit accumulator.
27*afc1ce82SMacpaul Lin - Instruction for efficient power management.
28*afc1ce82SMacpaul Lin - Bi-endian support.
29*afc1ce82SMacpaul Lin - Three instruction extension space for application acceleration:
30*afc1ce82SMacpaul Lin   - Performance extension.
31*afc1ce82SMacpaul Lin   - Andes future extensions (for floating-point, multimedia, etc.)
32*afc1ce82SMacpaul Lin   - Customer extensions.
33*afc1ce82SMacpaul Lin
34*afc1ce82SMacpaul LinAndesCore CPU
35*afc1ce82SMacpaul Lin=============
36*afc1ce82SMacpaul LinAndes Technology has 4 families of CPU cores: N12, N10, N9, N8.
37*afc1ce82SMacpaul Lin
38*afc1ce82SMacpaul LinFor details about N12 CPU family, please check doc/README.N1213.
39*afc1ce82SMacpaul Lin
40*afc1ce82SMacpaul LinThe NDS32 ports of u-boot, the Linux kernel, the GNU toolchain and
41*afc1ce82SMacpaul Linother associated software are actively supported by Andes Technology Corporation.
42