1 /* 2 * (C) Copyright 2014 - 2015 Xilinx, Inc. 3 * Michal Simek <michal.simek@xilinx.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <netdev.h> 10 #include <ahci.h> 11 #include <scsi.h> 12 #include <asm/arch/hardware.h> 13 #include <asm/arch/sys_proto.h> 14 #include <asm/io.h> 15 #include <usb.h> 16 #include <dwc3-uboot.h> 17 18 DECLARE_GLOBAL_DATA_PTR; 19 20 int board_init(void) 21 { 22 printf("EL Level:\tEL%d\n", current_el()); 23 24 return 0; 25 } 26 27 int board_early_init_r(void) 28 { 29 u32 val; 30 31 val = readl(&crlapb_base->timestamp_ref_ctrl); 32 val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; 33 writel(val, &crlapb_base->timestamp_ref_ctrl); 34 35 /* Program freq register in System counter and enable system counter */ 36 writel(gd->cpu_clk, &iou_scntr->base_frequency_id_register); 37 writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG | 38 ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN, 39 &iou_scntr->counter_control_register); 40 41 return 0; 42 } 43 44 int dram_init(void) 45 { 46 gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 47 48 return 0; 49 } 50 51 int timer_init(void) 52 { 53 return 0; 54 } 55 56 void reset_cpu(ulong addr) 57 { 58 } 59 60 #ifdef CONFIG_SCSI_AHCI_PLAT 61 void scsi_init(void) 62 { 63 ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR); 64 scsi_scan(1); 65 } 66 #endif 67 68 #ifdef CONFIG_CMD_MMC 69 int board_mmc_init(bd_t *bd) 70 { 71 int ret = 0; 72 73 u32 ver = zynqmp_get_silicon_version(); 74 75 if (ver != ZYNQMP_CSU_VERSION_VELOCE) { 76 #if defined(CONFIG_ZYNQ_SDHCI) 77 # if defined(CONFIG_ZYNQ_SDHCI0) 78 ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0); 79 # endif 80 # if defined(CONFIG_ZYNQ_SDHCI1) 81 ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1); 82 # endif 83 #endif 84 } 85 86 return ret; 87 } 88 #endif 89 90 int board_late_init(void) 91 { 92 u32 reg = 0; 93 u8 bootmode; 94 95 reg = readl(&crlapb_base->boot_mode); 96 bootmode = reg & BOOT_MODES_MASK; 97 98 switch (bootmode) { 99 case SD_MODE: 100 case EMMC_MODE: 101 setenv("modeboot", "sdboot"); 102 break; 103 default: 104 printf("Invalid Boot Mode:0x%x\n", bootmode); 105 break; 106 } 107 108 return 0; 109 } 110 111 int checkboard(void) 112 { 113 puts("Board:\tXilinx ZynqMP\n"); 114 return 0; 115 } 116 117 #ifdef CONFIG_USB_DWC3 118 static struct dwc3_device dwc3_device_data = { 119 .maximum_speed = USB_SPEED_HIGH, 120 .base = ZYNQMP_USB0_XHCI_BASEADDR, 121 .dr_mode = USB_DR_MODE_PERIPHERAL, 122 .index = 0, 123 }; 124 125 int usb_gadget_handle_interrupts(void) 126 { 127 dwc3_uboot_handle_interrupt(0); 128 return 0; 129 } 130 131 int board_usb_init(int index, enum usb_init_type init) 132 { 133 return dwc3_uboot_init(&dwc3_device_data); 134 } 135 136 int board_usb_cleanup(int index, enum usb_init_type init) 137 { 138 dwc3_uboot_exit(index); 139 return 0; 140 } 141 #endif 142