1 /* 2 * Based on corenet_ds.c 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <command.h> 9 #include <netdev.h> 10 #include <linux/compiler.h> 11 #include <asm/mmu.h> 12 #include <asm/processor.h> 13 #include <asm/cache.h> 14 #include <asm/immap_85xx.h> 15 #include <asm/fsl_law.h> 16 #include <asm/fsl_serdes.h> 17 #include <asm/fsl_portals.h> 18 #include <asm/fsl_liodn.h> 19 #include <fm_eth.h> 20 #include <pci.h> 21 22 #include "cyrus.h" 23 #include "../common/eeprom.h" 24 25 #define GPIO_OPENDRAIN 0x30000000 26 #define GPIO_DIR 0x3c000004 27 #define GPIO_INITIAL 0x30000000 28 #define GPIO_VGA_SWITCH 0x00001000 29 30 int checkboard(void) 31 { 32 printf("Board: CYRUS\n"); 33 34 return 0; 35 } 36 37 int board_early_init_f(void) 38 { 39 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 40 ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); 41 42 /* 43 * Only use DDR1_MCK0/3 and DDR2_MCK0/3 44 * disable DDR1_MCK1/2/4/5 and DDR2_MCK1/2/4/5 to reduce 45 * the noise introduced by these unterminated and unused clock pairs. 46 */ 47 setbits_be32(&gur->ddrclkdr, 0x001B001B); 48 49 /* Set GPIO reset lines to open-drain, tristate */ 50 setbits_be32(&pgpio->gpdat, GPIO_INITIAL); 51 setbits_be32(&pgpio->gpodr, GPIO_OPENDRAIN); 52 53 /* Set GPIO Direction */ 54 setbits_be32(&pgpio->gpdir, GPIO_DIR); 55 56 return 0; 57 } 58 59 int board_early_init_r(void) 60 { 61 fsl_lbc_t *lbc = LBC_BASE_ADDR; 62 63 out_be32(&lbc->lbcr, 0); 64 /* 1 clock LALE cycle */ 65 out_be32(&lbc->lcrr, 0x80000000 | CONFIG_SYS_LBC_LCRR); 66 67 set_liodns(); 68 69 #ifdef CONFIG_SYS_DPAA_QBMAN 70 setup_qbman_portals(); 71 #endif 72 print_lbc_regs(); 73 return 0; 74 } 75 76 int misc_init_r(void) 77 { 78 return 0; 79 } 80 81 int ft_board_setup(void *blob, bd_t *bd) 82 { 83 phys_addr_t base; 84 phys_size_t size; 85 86 ft_cpu_setup(blob, bd); 87 88 base = env_get_bootm_low(); 89 size = env_get_bootm_size(); 90 91 fdt_fixup_memory(blob, (u64)base, (u64)size); 92 93 #ifdef CONFIG_PCI 94 pci_of_setup(blob, bd); 95 #endif 96 97 fdt_fixup_liodn(blob); 98 fsl_fdt_fixup_dr_usb(blob, bd); 99 100 #ifdef CONFIG_SYS_DPAA_FMAN 101 fdt_fixup_fman_ethernet(blob); 102 #endif 103 104 return 0; 105 } 106 107 int mac_read_from_eeprom(void) 108 { 109 init_eeprom(CONFIG_SYS_EEPROM_BUS_NUM, 110 CONFIG_SYS_I2C_EEPROM_ADDR, 111 CONFIG_SYS_I2C_EEPROM_ADDR_LEN); 112 113 return mac_read_from_eeprom_common(); 114 } 115