1 /* 2 * K2L EVM : Board initialization 3 * 4 * (C) Copyright 2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <asm/arch/ddr3.h> 12 #include <asm/arch/hardware.h> 13 #include <asm/ti-common/keystone_net.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 unsigned int external_clk[ext_clk_count] = { 18 [sys_clk] = 122880000, 19 [alt_core_clk] = 100000000, 20 [pa_clk] = 122880000, 21 [tetris_clk] = 122880000, 22 [ddr3_clk] = 100000000, 23 [pcie_clk] = 100000000, 24 [sgmii_clk] = 156250000, 25 [usb_clk] = 100000000, 26 }; 27 28 static struct pll_init_data core_pll_config[NUM_SPDS] = { 29 [SPD800] = CORE_PLL_799, 30 [SPD1000] = CORE_PLL_1000, 31 [SPD800] = CORE_PLL_1198, 32 }; 33 34 s16 divn_val[16] = { 35 0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 36 }; 37 38 static struct pll_init_data tetris_pll_config[] = { 39 [SPD800] = TETRIS_PLL_799, 40 [SPD1000] = TETRIS_PLL_1000, 41 [SPD1200] = TETRIS_PLL_1198, 42 [SPD1350] = TETRIS_PLL_1352, 43 [SPD1400] = TETRIS_PLL_1401, 44 }; 45 46 static struct pll_init_data pa_pll_config = 47 PASS_PLL_983; 48 49 struct pll_init_data *get_pll_init_data(int pll) 50 { 51 int speed; 52 struct pll_init_data *data; 53 54 switch (pll) { 55 case MAIN_PLL: 56 speed = get_max_dev_speed(); 57 data = &core_pll_config[speed]; 58 break; 59 case TETRIS_PLL: 60 speed = get_max_arm_speed(); 61 data = &tetris_pll_config[speed]; 62 break; 63 case PASS_PLL: 64 data = &pa_pll_config; 65 break; 66 default: 67 data = NULL; 68 } 69 70 return data; 71 } 72 73 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET 74 struct eth_priv_t eth_priv_cfg[] = { 75 { 76 .int_name = "K2L_EMAC", 77 .rx_flow = 0, 78 .phy_addr = 0, 79 .slave_port = 1, 80 .sgmii_link_type = SGMII_LINK_MAC_PHY, 81 }, 82 { 83 .int_name = "K2L_EMAC1", 84 .rx_flow = 8, 85 .phy_addr = 1, 86 .slave_port = 2, 87 .sgmii_link_type = SGMII_LINK_MAC_PHY, 88 }, 89 { 90 .int_name = "K2L_EMAC2", 91 .rx_flow = 16, 92 .phy_addr = 2, 93 .slave_port = 3, 94 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, 95 }, 96 { 97 .int_name = "K2L_EMAC3", 98 .rx_flow = 32, 99 .phy_addr = 3, 100 .slave_port = 4, 101 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, 102 }, 103 }; 104 105 int get_num_eth_ports(void) 106 { 107 return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t); 108 } 109 #endif 110 111 #ifdef CONFIG_BOARD_EARLY_INIT_F 112 int board_early_init_f(void) 113 { 114 init_plls(); 115 116 return 0; 117 } 118 #endif 119 120 #ifdef CONFIG_SPL_BUILD 121 void spl_init_keystone_plls(void) 122 { 123 init_plls(); 124 } 125 #endif 126