1 /* 2 * K2L EVM : Board initialization 3 * 4 * (C) Copyright 2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <asm/arch/ddr3.h> 12 #include <asm/arch/hardware.h> 13 #include <asm/ti-common/keystone_net.h> 14 15 unsigned int get_external_clk(u32 clk) 16 { 17 unsigned int clk_freq; 18 19 switch (clk) { 20 case sys_clk: 21 clk_freq = 122880000; 22 break; 23 case alt_core_clk: 24 clk_freq = 100000000; 25 break; 26 case pa_clk: 27 clk_freq = 122880000; 28 break; 29 case tetris_clk: 30 clk_freq = 122880000; 31 break; 32 case ddr3a_clk: 33 clk_freq = 100000000; 34 break; 35 default: 36 clk_freq = 0; 37 break; 38 } 39 40 return clk_freq; 41 } 42 43 static struct pll_init_data core_pll_config[NUM_SPDS] = { 44 [SPD800] = CORE_PLL_799, 45 [SPD1000] = CORE_PLL_1000, 46 [SPD1200] = CORE_PLL_1198, 47 }; 48 49 s16 divn_val[16] = { 50 0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 51 }; 52 53 static struct pll_init_data tetris_pll_config[] = { 54 [SPD800] = TETRIS_PLL_799, 55 [SPD1000] = TETRIS_PLL_1000, 56 [SPD1200] = TETRIS_PLL_1198, 57 [SPD1350] = TETRIS_PLL_1352, 58 [SPD1400] = TETRIS_PLL_1401, 59 }; 60 61 static struct pll_init_data pa_pll_config = 62 PASS_PLL_983; 63 64 struct pll_init_data *get_pll_init_data(int pll) 65 { 66 int speed; 67 struct pll_init_data *data; 68 69 switch (pll) { 70 case MAIN_PLL: 71 speed = get_max_dev_speed(speeds); 72 data = &core_pll_config[speed]; 73 break; 74 case TETRIS_PLL: 75 speed = get_max_arm_speed(speeds); 76 data = &tetris_pll_config[speed]; 77 break; 78 case PASS_PLL: 79 data = &pa_pll_config; 80 break; 81 default: 82 data = NULL; 83 } 84 85 return data; 86 } 87 88 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET 89 struct eth_priv_t eth_priv_cfg[] = { 90 { 91 .int_name = "K2L_EMAC", 92 .rx_flow = 0, 93 .phy_addr = 0, 94 .slave_port = 1, 95 .sgmii_link_type = SGMII_LINK_MAC_PHY, 96 .phy_if = PHY_INTERFACE_MODE_SGMII, 97 }, 98 { 99 .int_name = "K2L_EMAC1", 100 .rx_flow = 8, 101 .phy_addr = 1, 102 .slave_port = 2, 103 .sgmii_link_type = SGMII_LINK_MAC_PHY, 104 .phy_if = PHY_INTERFACE_MODE_SGMII, 105 }, 106 { 107 .int_name = "K2L_EMAC2", 108 .rx_flow = 16, 109 .phy_addr = 2, 110 .slave_port = 3, 111 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, 112 .phy_if = PHY_INTERFACE_MODE_SGMII, 113 }, 114 { 115 .int_name = "K2L_EMAC3", 116 .rx_flow = 32, 117 .phy_addr = 3, 118 .slave_port = 4, 119 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED, 120 .phy_if = PHY_INTERFACE_MODE_SGMII, 121 }, 122 }; 123 124 int get_num_eth_ports(void) 125 { 126 return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t); 127 } 128 #endif 129 130 #ifdef CONFIG_BOARD_EARLY_INIT_F 131 int board_early_init_f(void) 132 { 133 init_plls(); 134 135 return 0; 136 } 137 #endif 138 139 #if defined(CONFIG_MULTI_DTB_FIT) 140 int board_fit_config_name_match(const char *name) 141 { 142 if (!strcmp(name, "keystone-k2l-evm")) 143 return 0; 144 145 return -1; 146 } 147 #endif 148 149 #ifdef CONFIG_SPL_BUILD 150 void spl_init_keystone_plls(void) 151 { 152 init_plls(); 153 } 154 #endif 155