1 /* 2 * (C) Copyright 2016 3 * Vikas Manocha, <vikas.manocha@st.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <dm.h> 10 #include <ram.h> 11 #include <asm/io.h> 12 #include <asm/armv7m.h> 13 #include <asm/arch/stm32.h> 14 #include <asm/arch/gpio.h> 15 #include <dm/platdata.h> 16 #include <dm/platform_data/serial_stm32x7.h> 17 #include <asm/arch/stm32_periph.h> 18 #include <asm/arch/stm32_defs.h> 19 #include <asm/arch/syscfg.h> 20 21 DECLARE_GLOBAL_DATA_PTR; 22 23 int dram_init(void) 24 { 25 struct udevice *dev; 26 struct ram_info ram; 27 int rv; 28 29 rv = uclass_get_device(UCLASS_RAM, 0, &dev); 30 if (rv) { 31 debug("DRAM init failed: %d\n", rv); 32 return rv; 33 } 34 rv = ram_get_info(dev, &ram); 35 if (rv) { 36 debug("Cannot get DRAM size: %d\n", rv); 37 return rv; 38 } 39 debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size); 40 gd->ram_size = ram.size; 41 42 /* 43 * Fill in global info with description of SRAM configuration 44 */ 45 gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE; 46 gd->bd->bi_dram[0].size = ram.size; 47 48 return rv; 49 } 50 51 #ifdef CONFIG_ETH_DESIGNWARE 52 static int stmmac_setup(void) 53 { 54 clock_setup(SYSCFG_CLOCK_CFG); 55 /* Set >RMII mode */ 56 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL; 57 clock_setup(STMMAC_CLOCK_CFG); 58 59 return 0; 60 } 61 62 int board_early_init_f(void) 63 { 64 stmmac_setup(); 65 66 return 0; 67 } 68 #endif 69 70 u32 get_board_rev(void) 71 { 72 return 0; 73 } 74 75 int board_init(void) 76 { 77 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 78 79 return 0; 80 } 81