1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2058d2316SBoris BREZILLON /*
3058d2316SBoris BREZILLON * Copyright (C) 2013 Freescale Semiconductor, Inc.
4058d2316SBoris BREZILLON * Copyright (C) 2015 ECA Sinters
5058d2316SBoris BREZILLON *
6058d2316SBoris BREZILLON * Author: Fabio Estevam <fabio.estevam@freescale.com>
7058d2316SBoris BREZILLON * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
8058d2316SBoris BREZILLON */
9058d2316SBoris BREZILLON
10058d2316SBoris BREZILLON #include <asm/arch/clock.h>
11058d2316SBoris BREZILLON #include <asm/arch/imx-regs.h>
12058d2316SBoris BREZILLON #include <asm/arch/iomux.h>
13058d2316SBoris BREZILLON #include <asm/arch/mx6-pins.h>
141221ce45SMasahiro Yamada #include <linux/errno.h>
15058d2316SBoris BREZILLON #include <asm/gpio.h>
16552a848eSStefano Babic #include <asm/mach-imx/iomux-v3.h>
17552a848eSStefano Babic #include <asm/mach-imx/boot_mode.h>
18058d2316SBoris BREZILLON #include <mmc.h>
19058d2316SBoris BREZILLON #include <fsl_esdhc.h>
20058d2316SBoris BREZILLON #include <miiphy.h>
21058d2316SBoris BREZILLON #include <netdev.h>
22058d2316SBoris BREZILLON #include <asm/arch/mxc_hdmi.h>
23058d2316SBoris BREZILLON #include <asm/arch/crm_regs.h>
24058d2316SBoris BREZILLON #include <linux/fb.h>
25058d2316SBoris BREZILLON #include <ipu_pixfmt.h>
26058d2316SBoris BREZILLON #include <asm/io.h>
27058d2316SBoris BREZILLON #include <asm/arch/sys_proto.h>
28058d2316SBoris BREZILLON #include <micrel.h>
29552a848eSStefano Babic #include <asm/mach-imx/mxc_i2c.h>
30058d2316SBoris BREZILLON #include <i2c.h>
31058d2316SBoris BREZILLON
32058d2316SBoris BREZILLON #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
33058d2316SBoris BREZILLON PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
34058d2316SBoris BREZILLON PAD_CTL_SRE_FAST | PAD_CTL_HYS)
35058d2316SBoris BREZILLON
36058d2316SBoris BREZILLON static iomux_v3_cfg_t const uart2_pads[] = {
37058d2316SBoris BREZILLON MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
38058d2316SBoris BREZILLON MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
39058d2316SBoris BREZILLON };
40058d2316SBoris BREZILLON
seco_mx6_setup_uart_iomux(void)41058d2316SBoris BREZILLON void seco_mx6_setup_uart_iomux(void)
42058d2316SBoris BREZILLON {
43058d2316SBoris BREZILLON imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
44058d2316SBoris BREZILLON }
45058d2316SBoris BREZILLON
46058d2316SBoris BREZILLON #define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
47058d2316SBoris BREZILLON PAD_CTL_SPEED_MED | \
48058d2316SBoris BREZILLON PAD_CTL_DSE_40ohm | \
49058d2316SBoris BREZILLON PAD_CTL_HYS)
50058d2316SBoris BREZILLON
51058d2316SBoris BREZILLON static iomux_v3_cfg_t const enet_pads[] = {
52058d2316SBoris BREZILLON MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
53058d2316SBoris BREZILLON MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
54058d2316SBoris BREZILLON MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
55058d2316SBoris BREZILLON MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
56058d2316SBoris BREZILLON MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
57058d2316SBoris BREZILLON MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
58058d2316SBoris BREZILLON MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
59058d2316SBoris BREZILLON MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
60058d2316SBoris BREZILLON MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
61058d2316SBoris BREZILLON MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
62058d2316SBoris BREZILLON MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
63058d2316SBoris BREZILLON MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
64058d2316SBoris BREZILLON MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
65058d2316SBoris BREZILLON MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
66058d2316SBoris BREZILLON MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
67058d2316SBoris BREZILLON };
68058d2316SBoris BREZILLON
seco_mx6_setup_enet_iomux(void)69058d2316SBoris BREZILLON void seco_mx6_setup_enet_iomux(void)
70058d2316SBoris BREZILLON {
71058d2316SBoris BREZILLON imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
72058d2316SBoris BREZILLON }
73058d2316SBoris BREZILLON
seco_mx6_rgmii_rework(struct phy_device * phydev)74058d2316SBoris BREZILLON int seco_mx6_rgmii_rework(struct phy_device *phydev)
75058d2316SBoris BREZILLON {
76058d2316SBoris BREZILLON /* control data pad skew - devaddr = 0x02, register = 0x04 */
77058d2316SBoris BREZILLON ksz9031_phy_extended_write(phydev, 0x02,
78058d2316SBoris BREZILLON MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
79058d2316SBoris BREZILLON MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
80058d2316SBoris BREZILLON /* rx data pad skew - devaddr = 0x02, register = 0x05 */
81058d2316SBoris BREZILLON ksz9031_phy_extended_write(phydev, 0x02,
82058d2316SBoris BREZILLON MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
83058d2316SBoris BREZILLON MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
84058d2316SBoris BREZILLON /* tx data pad skew - devaddr = 0x02, register = 0x05 */
85058d2316SBoris BREZILLON ksz9031_phy_extended_write(phydev, 0x02,
86058d2316SBoris BREZILLON MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
87058d2316SBoris BREZILLON MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
88058d2316SBoris BREZILLON
89058d2316SBoris BREZILLON /* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */
90058d2316SBoris BREZILLON ksz9031_phy_extended_write(phydev, 0x02,
91058d2316SBoris BREZILLON MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
92058d2316SBoris BREZILLON MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF);
93058d2316SBoris BREZILLON return 0;
94058d2316SBoris BREZILLON }
95058d2316SBoris BREZILLON
96058d2316SBoris BREZILLON #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
97058d2316SBoris BREZILLON PAD_CTL_SPEED_LOW | \
98058d2316SBoris BREZILLON PAD_CTL_DSE_80ohm | \
99058d2316SBoris BREZILLON PAD_CTL_SRE_FAST | \
100058d2316SBoris BREZILLON PAD_CTL_HYS)
101058d2316SBoris BREZILLON
102058d2316SBoris BREZILLON static iomux_v3_cfg_t const usdhc3_pads[] = {
103058d2316SBoris BREZILLON MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
104058d2316SBoris BREZILLON MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
105058d2316SBoris BREZILLON MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
106058d2316SBoris BREZILLON MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
107058d2316SBoris BREZILLON MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
108058d2316SBoris BREZILLON MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
109058d2316SBoris BREZILLON };
110058d2316SBoris BREZILLON
111058d2316SBoris BREZILLON static iomux_v3_cfg_t const usdhc4_pads[] = {
112058d2316SBoris BREZILLON MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
113058d2316SBoris BREZILLON MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
114058d2316SBoris BREZILLON MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
115058d2316SBoris BREZILLON MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
116058d2316SBoris BREZILLON MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
117058d2316SBoris BREZILLON MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
118058d2316SBoris BREZILLON };
119058d2316SBoris BREZILLON
seco_mx6_setup_usdhc_iomux(int id)120058d2316SBoris BREZILLON void seco_mx6_setup_usdhc_iomux(int id)
121058d2316SBoris BREZILLON {
122058d2316SBoris BREZILLON switch (id) {
123058d2316SBoris BREZILLON case 3:
124058d2316SBoris BREZILLON imx_iomux_v3_setup_multiple_pads(usdhc3_pads,
125058d2316SBoris BREZILLON ARRAY_SIZE(usdhc3_pads));
126058d2316SBoris BREZILLON break;
127058d2316SBoris BREZILLON
128058d2316SBoris BREZILLON case 4:
129058d2316SBoris BREZILLON imx_iomux_v3_setup_multiple_pads(usdhc4_pads,
130058d2316SBoris BREZILLON ARRAY_SIZE(usdhc4_pads));
131058d2316SBoris BREZILLON break;
132058d2316SBoris BREZILLON
133058d2316SBoris BREZILLON default:
134058d2316SBoris BREZILLON printf("Warning: invalid usdhc id (%d)\n", id);
135058d2316SBoris BREZILLON break;
136058d2316SBoris BREZILLON }
137058d2316SBoris BREZILLON }
138