1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * Kyungmin Park <kyungmin.park@samsung.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <common.h> 10 #include <spi.h> 11 #include <lcd.h> 12 #include <asm/io.h> 13 #include <asm/gpio.h> 14 #include <asm/arch/adc.h> 15 #include <asm/arch/pinmux.h> 16 #include <asm/arch/watchdog.h> 17 #include <ld9040.h> 18 #include <power/pmic.h> 19 #include <usb.h> 20 #include <usb/s3c_udc.h> 21 #include <asm/arch/cpu.h> 22 #include <power/max8998_pmic.h> 23 #include <libtizen.h> 24 #include <samsung/misc.h> 25 #include <usb_mass_storage.h> 26 27 DECLARE_GLOBAL_DATA_PTR; 28 29 unsigned int board_rev; 30 31 u32 get_board_rev(void) 32 { 33 return board_rev; 34 } 35 36 static int get_hwrev(void) 37 { 38 return board_rev & 0xFF; 39 } 40 41 static void init_pmic_lcd(void); 42 43 int exynos_power_init(void) 44 { 45 int ret; 46 47 /* 48 * For PMIC the I2C bus is named as I2C5, but it is connected 49 * to logical I2C adapter 0 50 */ 51 ret = pmic_init(I2C_0); 52 if (ret) 53 return ret; 54 55 init_pmic_lcd(); 56 57 return 0; 58 } 59 60 static unsigned short get_adc_value(int channel) 61 { 62 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc(); 63 unsigned short ret = 0; 64 unsigned int reg; 65 unsigned int loop = 0; 66 67 writel(channel & 0xF, &adc->adcmux); 68 writel((1 << 14) | (49 << 6), &adc->adccon); 69 writel(1000 & 0xffff, &adc->adcdly); 70 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */ 71 udelay(10); 72 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */ 73 udelay(10); 74 75 do { 76 udelay(1); 77 reg = readl(&adc->adccon); 78 } while (!(reg & (1 << 15)) && (loop++ < 1000)); 79 80 ret = readl(&adc->adcdat0) & 0xFFF; 81 82 return ret; 83 } 84 85 static int adc_power_control(int on) 86 { 87 int ret; 88 struct pmic *p = pmic_get("MAX8998_PMIC"); 89 if (!p) 90 return -ENODEV; 91 92 if (pmic_probe(p)) 93 return -1; 94 95 ret = pmic_set_output(p, 96 MAX8998_REG_ONOFF1, 97 MAX8998_LDO4, !!on); 98 99 return ret; 100 } 101 102 static unsigned int get_hw_revision(void) 103 { 104 int hwrev, mode0, mode1; 105 106 adc_power_control(1); 107 108 mode0 = get_adc_value(1); /* HWREV_MODE0 */ 109 mode1 = get_adc_value(2); /* HWREV_MODE1 */ 110 111 /* 112 * XXX Always set the default hwrev as the latest board 113 * ADC = (voltage) / 3.3 * 4096 114 */ 115 hwrev = 3; 116 117 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max)) 118 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200)) 119 hwrev = 0x0; /* 0.01V 0.01V */ 120 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200)) 121 hwrev = 0x1; /* 610mV 0.01V */ 122 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200)) 123 hwrev = 0x2; /* 1.16V 0.01V */ 124 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200)) 125 hwrev = 0x3; /* 1.79V 0.01V */ 126 #undef IS_RANGE 127 128 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); 129 130 adc_power_control(0); 131 132 return hwrev; 133 } 134 135 static void check_hw_revision(void) 136 { 137 int hwrev; 138 139 hwrev = get_hw_revision(); 140 141 board_rev |= hwrev; 142 } 143 144 #ifdef CONFIG_USB_GADGET 145 static int s5pc210_phy_control(int on) 146 { 147 int ret = 0; 148 struct pmic *p = pmic_get("MAX8998_PMIC"); 149 if (!p) 150 return -ENODEV; 151 152 if (pmic_probe(p)) 153 return -1; 154 155 if (on) { 156 ret |= pmic_set_output(p, 157 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, 158 MAX8998_SAFEOUT1, LDO_ON); 159 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1, 160 MAX8998_LDO3, LDO_ON); 161 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2, 162 MAX8998_LDO8, LDO_ON); 163 164 } else { 165 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2, 166 MAX8998_LDO8, LDO_OFF); 167 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1, 168 MAX8998_LDO3, LDO_OFF); 169 ret |= pmic_set_output(p, 170 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, 171 MAX8998_SAFEOUT1, LDO_OFF); 172 } 173 174 if (ret) { 175 puts("MAX8998 LDO setting error!\n"); 176 return -1; 177 } 178 179 return 0; 180 } 181 182 struct s3c_plat_otg_data s5pc210_otg_data = { 183 .phy_control = s5pc210_phy_control, 184 .regs_phy = EXYNOS4_USBPHY_BASE, 185 .regs_otg = EXYNOS4_USBOTG_BASE, 186 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL, 187 .usb_flags = PHY0_SLEEP, 188 }; 189 #endif 190 191 int board_usb_init(int index, enum usb_init_type init) 192 { 193 debug("USB_udc_probe\n"); 194 return s3c_udc_probe(&s5pc210_otg_data); 195 } 196 197 int exynos_early_init_f(void) 198 { 199 wdt_stop(); 200 201 return 0; 202 } 203 204 #ifdef CONFIG_SOFT_SPI 205 static void soft_spi_init(void) 206 { 207 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK, 208 CONFIG_SOFT_SPI_MODE & SPI_CPOL); 209 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1); 210 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO); 211 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS, 212 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); 213 } 214 215 void spi_cs_activate(struct spi_slave *slave) 216 { 217 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, 218 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); 219 SPI_SCL(1); 220 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, 221 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH); 222 } 223 224 void spi_cs_deactivate(struct spi_slave *slave) 225 { 226 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, 227 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); 228 } 229 230 int spi_cs_is_valid(unsigned int bus, unsigned int cs) 231 { 232 return bus == 0 && cs == 0; 233 } 234 235 void universal_spi_scl(int bit) 236 { 237 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit); 238 } 239 240 void universal_spi_sda(int bit) 241 { 242 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit); 243 } 244 245 int universal_spi_read(void) 246 { 247 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO); 248 } 249 #endif 250 251 static void init_pmic_lcd(void) 252 { 253 unsigned char val; 254 int ret = 0; 255 256 struct pmic *p = pmic_get("MAX8998_PMIC"); 257 258 if (!p) 259 return; 260 261 if (pmic_probe(p)) 262 return; 263 264 /* LDO7 1.8V */ 265 val = 0x02; /* (1800 - 1600) / 100; */ 266 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val); 267 268 /* LDO17 3.0V */ 269 val = 0xe; /* (3000 - 1600) / 100; */ 270 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val); 271 272 /* Disable unneeded regulators */ 273 /* 274 * ONOFF1 275 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON 276 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON 277 */ 278 val = 0xB9; 279 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val); 280 281 /* ONOFF2 282 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON, 283 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF 284 */ 285 val = 0x50; 286 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val); 287 288 /* ONOFF3 289 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF 290 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF 291 */ 292 val = 0x00; 293 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val); 294 295 if (ret) 296 puts("LCD pmic initialisation error!\n"); 297 } 298 299 void exynos_cfg_lcd_gpio(void) 300 { 301 unsigned int i, f3_end = 4; 302 303 for (i = 0; i < 8; i++) { 304 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */ 305 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2)); 306 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2)); 307 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2)); 308 /* pull-up/down disable */ 309 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE); 310 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE); 311 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE); 312 313 /* drive strength to max (24bit) */ 314 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X); 315 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); 316 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X); 317 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW); 318 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X); 319 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); 320 } 321 322 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) { 323 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */ 324 gpio_cfg_pin(i, S5P_GPIO_FUNC(2)); 325 /* pull-up/down disable */ 326 gpio_set_pull(i, S5P_GPIO_PULL_NONE); 327 /* drive strength to max (24bit) */ 328 gpio_set_drv(i, S5P_GPIO_DRV_4X); 329 gpio_set_rate(i, S5P_GPIO_DRV_SLOW); 330 } 331 332 /* gpio pad configuration for LCD reset. */ 333 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT); 334 335 spi_init(); 336 } 337 338 int mipi_power(void) 339 { 340 return 0; 341 } 342 343 void exynos_reset_lcd(void) 344 { 345 gpio_set_value(EXYNOS4_GPIO_Y45, 1); 346 udelay(10000); 347 gpio_set_value(EXYNOS4_GPIO_Y45, 0); 348 udelay(10000); 349 gpio_set_value(EXYNOS4_GPIO_Y45, 1); 350 udelay(100); 351 } 352 353 void exynos_lcd_power_on(void) 354 { 355 struct pmic *p = pmic_get("MAX8998_PMIC"); 356 357 if (!p) 358 return; 359 360 if (pmic_probe(p)) 361 return; 362 363 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON); 364 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON); 365 } 366 367 void exynos_cfg_ldo(void) 368 { 369 ld9040_cfg_ldo(); 370 } 371 372 void exynos_enable_ldo(unsigned int onoff) 373 { 374 ld9040_enable_ldo(onoff); 375 } 376 377 int exynos_init(void) 378 { 379 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; 380 381 switch (get_hwrev()) { 382 case 0: 383 /* 384 * Set the low to enable LDO_EN 385 * But when you use the test board for eMMC booting 386 * you should set it HIGH since it removes the inverter 387 */ 388 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */ 389 gpio_direction_output(EXYNOS4_GPIO_E36, 0); 390 break; 391 default: 392 /* 393 * Default reset state is High and there's no inverter 394 * But set it as HIGH to ensure 395 */ 396 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */ 397 gpio_direction_output(EXYNOS4_GPIO_E13, 1); 398 break; 399 } 400 401 #ifdef CONFIG_SOFT_SPI 402 soft_spi_init(); 403 #endif 404 check_hw_revision(); 405 printf("HW Revision:\t0x%x\n", board_rev); 406 407 return 0; 408 } 409 410 void exynos_lcd_misc_init(vidinfo_t *vid) 411 { 412 #ifdef CONFIG_TIZEN 413 get_tizen_logo_info(vid); 414 #endif 415 416 /* for LD9040. */ 417 vid->pclk_name = 1; /* MPLL */ 418 vid->sclk_div = 1; 419 420 setenv("lcdinfo", "lcd=ld9040"); 421 } 422