xref: /openbmc/u-boot/board/samsung/arndale/arndale.c (revision a2ac68fb2b35e57cd483e7d6fb30b9d9331acc01)
1*a2ac68fbSChander Kashyap /*
2*a2ac68fbSChander Kashyap  * Copyright (C) 2013 Samsung Electronics
3*a2ac68fbSChander Kashyap  *
4*a2ac68fbSChander Kashyap  * SPDX-License-Identifier:	GPL-2.0+
5*a2ac68fbSChander Kashyap  */
6*a2ac68fbSChander Kashyap 
7*a2ac68fbSChander Kashyap #include <common.h>
8*a2ac68fbSChander Kashyap #include <asm/arch/pinmux.h>
9*a2ac68fbSChander Kashyap #include <asm/arch/power.h>
10*a2ac68fbSChander Kashyap 
11*a2ac68fbSChander Kashyap DECLARE_GLOBAL_DATA_PTR;
12*a2ac68fbSChander Kashyap 
13*a2ac68fbSChander Kashyap int board_init(void)
14*a2ac68fbSChander Kashyap {
15*a2ac68fbSChander Kashyap 	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
16*a2ac68fbSChander Kashyap 	return 0;
17*a2ac68fbSChander Kashyap }
18*a2ac68fbSChander Kashyap 
19*a2ac68fbSChander Kashyap int dram_init(void)
20*a2ac68fbSChander Kashyap {
21*a2ac68fbSChander Kashyap 	int i;
22*a2ac68fbSChander Kashyap 	u32 addr;
23*a2ac68fbSChander Kashyap 
24*a2ac68fbSChander Kashyap 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
25*a2ac68fbSChander Kashyap 		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
26*a2ac68fbSChander Kashyap 		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
27*a2ac68fbSChander Kashyap 	}
28*a2ac68fbSChander Kashyap 	return 0;
29*a2ac68fbSChander Kashyap }
30*a2ac68fbSChander Kashyap 
31*a2ac68fbSChander Kashyap int power_init_board(void)
32*a2ac68fbSChander Kashyap {
33*a2ac68fbSChander Kashyap 	set_ps_hold_ctrl();
34*a2ac68fbSChander Kashyap 	return 0;
35*a2ac68fbSChander Kashyap }
36*a2ac68fbSChander Kashyap 
37*a2ac68fbSChander Kashyap void dram_init_banksize(void)
38*a2ac68fbSChander Kashyap {
39*a2ac68fbSChander Kashyap 	int i;
40*a2ac68fbSChander Kashyap 	u32 addr, size;
41*a2ac68fbSChander Kashyap 
42*a2ac68fbSChander Kashyap 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
43*a2ac68fbSChander Kashyap 		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
44*a2ac68fbSChander Kashyap 		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
45*a2ac68fbSChander Kashyap 
46*a2ac68fbSChander Kashyap 		gd->bd->bi_dram[i].start = addr;
47*a2ac68fbSChander Kashyap 		gd->bd->bi_dram[i].size = size;
48*a2ac68fbSChander Kashyap 	}
49*a2ac68fbSChander Kashyap }
50*a2ac68fbSChander Kashyap 
51*a2ac68fbSChander Kashyap static int board_uart_init(void)
52*a2ac68fbSChander Kashyap {
53*a2ac68fbSChander Kashyap 	int err = 0, uart_id;
54*a2ac68fbSChander Kashyap 
55*a2ac68fbSChander Kashyap 	for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
56*a2ac68fbSChander Kashyap 		err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
57*a2ac68fbSChander Kashyap 		if (err) {
58*a2ac68fbSChander Kashyap 			debug("UART%d not configured\n",
59*a2ac68fbSChander Kashyap 			      (uart_id - PERIPH_ID_UART0));
60*a2ac68fbSChander Kashyap 			return err;
61*a2ac68fbSChander Kashyap 		}
62*a2ac68fbSChander Kashyap 	}
63*a2ac68fbSChander Kashyap 	return err;
64*a2ac68fbSChander Kashyap }
65*a2ac68fbSChander Kashyap 
66*a2ac68fbSChander Kashyap #ifdef CONFIG_BOARD_EARLY_INIT_F
67*a2ac68fbSChander Kashyap int board_early_init_f(void)
68*a2ac68fbSChander Kashyap {
69*a2ac68fbSChander Kashyap 	int err;
70*a2ac68fbSChander Kashyap 
71*a2ac68fbSChander Kashyap 	err = board_uart_init();
72*a2ac68fbSChander Kashyap 	if (err) {
73*a2ac68fbSChander Kashyap 		debug("UART init failed\n");
74*a2ac68fbSChander Kashyap 		return err;
75*a2ac68fbSChander Kashyap 	}
76*a2ac68fbSChander Kashyap 	return err;
77*a2ac68fbSChander Kashyap }
78*a2ac68fbSChander Kashyap #endif
79*a2ac68fbSChander Kashyap 
80*a2ac68fbSChander Kashyap #ifdef CONFIG_DISPLAY_BOARDINFO
81*a2ac68fbSChander Kashyap int checkboard(void)
82*a2ac68fbSChander Kashyap {
83*a2ac68fbSChander Kashyap 	printf("\nBoard: Arndale\n");
84*a2ac68fbSChander Kashyap 
85*a2ac68fbSChander Kashyap 	return 0;
86*a2ac68fbSChander Kashyap }
87*a2ac68fbSChander Kashyap #endif
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