1a2ac68fbSChander Kashyap /* 2a2ac68fbSChander Kashyap * Copyright (C) 2013 Samsung Electronics 3a2ac68fbSChander Kashyap * 4a2ac68fbSChander Kashyap * SPDX-License-Identifier: GPL-2.0+ 5a2ac68fbSChander Kashyap */ 6a2ac68fbSChander Kashyap 7a2ac68fbSChander Kashyap #include <common.h> 87da76512SInderpal Singh #include <usb.h> 9903fd795SSimon Glass #include <asm/gpio.h> 10a2ac68fbSChander Kashyap #include <asm/arch/pinmux.h> 11cc2b1012SInderpal Singh #include <asm/arch/dwmmc.h> 12a2ac68fbSChander Kashyap #include <asm/arch/power.h> 13a2ac68fbSChander Kashyap 14a2ac68fbSChander Kashyap DECLARE_GLOBAL_DATA_PTR; 15a2ac68fbSChander Kashyap 167da76512SInderpal Singh #ifdef CONFIG_USB_EHCI_EXYNOS 177da76512SInderpal Singh int board_usb_init(int index, enum usb_init_type init) 187da76512SInderpal Singh { 197da76512SInderpal Singh /* Configure gpios for usb 3503 hub: 207da76512SInderpal Singh * disconnect, toggle reset and connect 217da76512SInderpal Singh */ 227f196101SSimon Glass gpio_request(EXYNOS5_GPIO_D17, "usb_connect"); 237f196101SSimon Glass gpio_request(EXYNOS5_GPIO_X35, "usb_reset"); 24f6ae1ca0SAkshay Saraswat gpio_direction_output(EXYNOS5_GPIO_D17, 0); 25f6ae1ca0SAkshay Saraswat gpio_direction_output(EXYNOS5_GPIO_X35, 0); 267da76512SInderpal Singh 27f6ae1ca0SAkshay Saraswat gpio_direction_output(EXYNOS5_GPIO_X35, 1); 28f6ae1ca0SAkshay Saraswat gpio_direction_output(EXYNOS5_GPIO_D17, 1); 297da76512SInderpal Singh 307da76512SInderpal Singh return 0; 317da76512SInderpal Singh } 327da76512SInderpal Singh #endif 337da76512SInderpal Singh 34a2ac68fbSChander Kashyap int board_init(void) 35a2ac68fbSChander Kashyap { 36a2ac68fbSChander Kashyap gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); 37a2ac68fbSChander Kashyap return 0; 38a2ac68fbSChander Kashyap } 39a2ac68fbSChander Kashyap 40a2ac68fbSChander Kashyap int dram_init(void) 41a2ac68fbSChander Kashyap { 42a2ac68fbSChander Kashyap int i; 43a2ac68fbSChander Kashyap u32 addr; 44a2ac68fbSChander Kashyap 45a2ac68fbSChander Kashyap for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 46a2ac68fbSChander Kashyap addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 47a2ac68fbSChander Kashyap gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); 48a2ac68fbSChander Kashyap } 49a2ac68fbSChander Kashyap return 0; 50a2ac68fbSChander Kashyap } 51a2ac68fbSChander Kashyap 52a2ac68fbSChander Kashyap int power_init_board(void) 53a2ac68fbSChander Kashyap { 54a2ac68fbSChander Kashyap set_ps_hold_ctrl(); 55a2ac68fbSChander Kashyap return 0; 56a2ac68fbSChander Kashyap } 57a2ac68fbSChander Kashyap 5876b00acaSSimon Glass int dram_init_banksize(void) 59a2ac68fbSChander Kashyap { 60a2ac68fbSChander Kashyap int i; 61a2ac68fbSChander Kashyap u32 addr, size; 62a2ac68fbSChander Kashyap 63a2ac68fbSChander Kashyap for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 64a2ac68fbSChander Kashyap addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); 65a2ac68fbSChander Kashyap size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); 66a2ac68fbSChander Kashyap 67a2ac68fbSChander Kashyap gd->bd->bi_dram[i].start = addr; 68a2ac68fbSChander Kashyap gd->bd->bi_dram[i].size = size; 69a2ac68fbSChander Kashyap } 7076b00acaSSimon Glass 7176b00acaSSimon Glass return 0; 72a2ac68fbSChander Kashyap } 73a2ac68fbSChander Kashyap 74*4aa2ba3aSMasahiro Yamada #ifdef CONFIG_MMC 75cc2b1012SInderpal Singh int board_mmc_init(bd_t *bis) 76cc2b1012SInderpal Singh { 77cc2b1012SInderpal Singh int ret; 78cc2b1012SInderpal Singh /* dwmmc initializattion for available channels */ 79cc2b1012SInderpal Singh ret = exynos_dwmmc_init(gd->fdt_blob); 80cc2b1012SInderpal Singh if (ret) 81cc2b1012SInderpal Singh debug("dwmmc init failed\n"); 82cc2b1012SInderpal Singh 83cc2b1012SInderpal Singh return ret; 84cc2b1012SInderpal Singh } 85cc2b1012SInderpal Singh #endif 86cc2b1012SInderpal Singh 87a2ac68fbSChander Kashyap static int board_uart_init(void) 88a2ac68fbSChander Kashyap { 89a2ac68fbSChander Kashyap int err = 0, uart_id; 90a2ac68fbSChander Kashyap 91a2ac68fbSChander Kashyap for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { 92a2ac68fbSChander Kashyap err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); 93a2ac68fbSChander Kashyap if (err) { 94a2ac68fbSChander Kashyap debug("UART%d not configured\n", 95a2ac68fbSChander Kashyap (uart_id - PERIPH_ID_UART0)); 96a2ac68fbSChander Kashyap return err; 97a2ac68fbSChander Kashyap } 98a2ac68fbSChander Kashyap } 99a2ac68fbSChander Kashyap return err; 100a2ac68fbSChander Kashyap } 101a2ac68fbSChander Kashyap 102a2ac68fbSChander Kashyap #ifdef CONFIG_BOARD_EARLY_INIT_F 103a2ac68fbSChander Kashyap int board_early_init_f(void) 104a2ac68fbSChander Kashyap { 105a2ac68fbSChander Kashyap int err; 106a2ac68fbSChander Kashyap 107a2ac68fbSChander Kashyap err = board_uart_init(); 108a2ac68fbSChander Kashyap if (err) { 109a2ac68fbSChander Kashyap debug("UART init failed\n"); 110a2ac68fbSChander Kashyap return err; 111a2ac68fbSChander Kashyap } 112a2ac68fbSChander Kashyap return err; 113a2ac68fbSChander Kashyap } 114a2ac68fbSChander Kashyap #endif 115a2ac68fbSChander Kashyap 116a2ac68fbSChander Kashyap #ifdef CONFIG_DISPLAY_BOARDINFO 117a2ac68fbSChander Kashyap int checkboard(void) 118a2ac68fbSChander Kashyap { 119a2ac68fbSChander Kashyap printf("\nBoard: Arndale\n"); 120a2ac68fbSChander Kashyap 121a2ac68fbSChander Kashyap return 0; 122a2ac68fbSChander Kashyap } 123a2ac68fbSChander Kashyap #endif 124fafbc6c0SAndre Przywara 125fafbc6c0SAndre Przywara #ifdef CONFIG_S5P_PA_SYSRAM 126fafbc6c0SAndre Przywara void smp_set_core_boot_addr(unsigned long addr, int corenr) 127fafbc6c0SAndre Przywara { 128fafbc6c0SAndre Przywara writel(addr, CONFIG_S5P_PA_SYSRAM); 129fafbc6c0SAndre Przywara 130fafbc6c0SAndre Przywara /* make sure this write is really executed */ 131fafbc6c0SAndre Przywara __asm__ volatile ("dsb\n"); 132fafbc6c0SAndre Przywara } 133fafbc6c0SAndre Przywara #endif 134