1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 278385bf2SNobuhiro Iwamatsu /* 378385bf2SNobuhiro Iwamatsu * Copyright (C) 2008 Renesas Solutions Corp. 478385bf2SNobuhiro Iwamatsu * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 578385bf2SNobuhiro Iwamatsu * Copyright (C) 2007 Kenati Technologies, Inc. 678385bf2SNobuhiro Iwamatsu * 778385bf2SNobuhiro Iwamatsu * board/sh7763rdp/sh7763rdp.c 878385bf2SNobuhiro Iwamatsu */ 978385bf2SNobuhiro Iwamatsu 1078385bf2SNobuhiro Iwamatsu #include <common.h> 1178385bf2SNobuhiro Iwamatsu #include <asm/io.h> 1278385bf2SNobuhiro Iwamatsu #include <asm/processor.h> 1378385bf2SNobuhiro Iwamatsu 1478385bf2SNobuhiro Iwamatsu #define CPU_CMDREG 0xB1000006 1578385bf2SNobuhiro Iwamatsu #define PDCR 0xffef0006 1678385bf2SNobuhiro Iwamatsu #define PECR 0xffef0008 1778385bf2SNobuhiro Iwamatsu #define PFCR 0xffef000a 1878385bf2SNobuhiro Iwamatsu #define PGCR 0xffef000c 1978385bf2SNobuhiro Iwamatsu #define PHCR 0xffef000e 2078385bf2SNobuhiro Iwamatsu #define PJCR 0xffef0012 2178385bf2SNobuhiro Iwamatsu #define PKCR 0xffef0014 2278385bf2SNobuhiro Iwamatsu #define PLCR 0xffef0016 2378385bf2SNobuhiro Iwamatsu #define PMCR 0xffef0018 2478385bf2SNobuhiro Iwamatsu #define PSEL1 0xffef0072 2578385bf2SNobuhiro Iwamatsu #define PSEL2 0xffef0074 2678385bf2SNobuhiro Iwamatsu #define PSEL3 0xffef0076 2778385bf2SNobuhiro Iwamatsu checkboard(void)2878385bf2SNobuhiro Iwamatsuint checkboard(void) 2978385bf2SNobuhiro Iwamatsu { 3078385bf2SNobuhiro Iwamatsu puts("BOARD: Renesas SH7763 RDP\n"); 3178385bf2SNobuhiro Iwamatsu return 0; 3278385bf2SNobuhiro Iwamatsu } 3378385bf2SNobuhiro Iwamatsu board_init(void)3478385bf2SNobuhiro Iwamatsuint board_init(void) 3578385bf2SNobuhiro Iwamatsu { 3678385bf2SNobuhiro Iwamatsu vu_short dat; 3778385bf2SNobuhiro Iwamatsu 3878385bf2SNobuhiro Iwamatsu /* Enable mode */ 3978385bf2SNobuhiro Iwamatsu writew(inw(CPU_CMDREG)|0x0001, CPU_CMDREG); 4078385bf2SNobuhiro Iwamatsu 4178385bf2SNobuhiro Iwamatsu /* GPIO Setting (eth1) */ 4278385bf2SNobuhiro Iwamatsu dat = inw(PSEL1); 4378385bf2SNobuhiro Iwamatsu writew(((dat & ~0xff00) | 0x2400), PSEL1); 4478385bf2SNobuhiro Iwamatsu writew(0, PFCR); 4578385bf2SNobuhiro Iwamatsu writew(0, PGCR); 4678385bf2SNobuhiro Iwamatsu writew(0, PHCR); 4778385bf2SNobuhiro Iwamatsu 4878385bf2SNobuhiro Iwamatsu return 0; 4978385bf2SNobuhiro Iwamatsu } 5078385bf2SNobuhiro Iwamatsu led_set_state(unsigned short value)5178385bf2SNobuhiro Iwamatsuvoid led_set_state(unsigned short value) 5278385bf2SNobuhiro Iwamatsu { 5378385bf2SNobuhiro Iwamatsu } 54