1/* 2 * Copyright (C) 2008 Renesas Solutions Corp. 3 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 4 * 5 * board/ap325rxa/lowlevel_init.S 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23#include <config.h> 24#include <version.h> 25#include <asm/processor.h> 26 27/* 28 * Board specific low level init code, called _very_ early in the 29 * startup sequence. Relocation to SDRAM has not happened yet, no 30 * stack is available, bss section has not been initialised, etc. 31 * 32 * (Note: As no stack is available, no subroutines can be called...). 33 */ 34 35 .global lowlevel_init 36 37 .text 38 .align 2 39 40lowlevel_init: 41 mov.l DRVCRA_A, r1 42 mov.l DRVCRA_D, r0 43 mov.w r0, @r1 44 45 mov.l DRVCRB_A, r1 46 mov.l DRVCRB_D, r0 47 mov.w r0, @r1 48 49 mov.l RWTCSR_A, r1 50 mov.l RWTCSR_D1, r0 51 mov.w r0, @r1 52 53 mov.l RWTCNT_A, r1 54 mov.l RWTCNT_D, r0 55 mov.w r0, @r1 56 57 mov.l RWTCSR_A, r1 58 mov.l RWTCSR_D2, r0 59 mov.w r0, @r1 60 61 mov.l FRQCR_A, r1 62 mov.l FRQCR_D, r0 63 mov.l r0, @r1 64 65 mov.l CMNCR_A, r1 66 mov.l CMNCR_D, r0 67 mov.l r0, @r1 68 69 mov.l CS0BCR_A, r1 70 mov.l CS0BCR_D, r0 71 mov.l r0, @r1 72 73 mov.l CS4BCR_A, r1 74 mov.l CS4BCR_D, r0 75 mov.l r0, @r1 76 77 mov.l CS5ABCR_A, r1 78 mov.l CS5ABCR_D, r0 79 mov.l r0, @r1 80 81 mov.l CS5BBCR_A, r1 82 mov.l CS5BBCR_D, r0 83 mov.l r0, @r1 84 85 mov.l CS6ABCR_A, r1 86 mov.l CS6ABCR_D, r0 87 mov.l r0, @r1 88 89 mov.l CS6BBCR_A, r1 90 mov.l CS6BBCR_D, r0 91 mov.l r0, @r1 92 93 mov.l CS0WCR_A, r1 94 mov.l CS0WCR_D, r0 95 mov.l r0, @r1 96 97 mov.l CS4WCR_A, r1 98 mov.l CS4WCR_D, r0 99 mov.l r0, @r1 100 101 mov.l CS5AWCR_A, r1 102 mov.l CS5AWCR_D, r0 103 mov.l r0, @r1 104 105 mov.l CS5BWCR_A, r1 106 mov.l CS5BWCR_D, r0 107 mov.l r0, @r1 108 109 mov.l CS6AWCR_A, r1 110 mov.l CS6AWCR_D, r0 111 mov.l r0, @r1 112 113 mov.l CS6BWCR_A, r1 114 mov.l CS6BWCR_D, r0 115 mov.l r0, @r1 116 117 mov.l SBSC_SDCR_A, r1 118 mov.l SBSC_SDCR_D1, r0 119 mov.l r0, @r1 120 121 mov.l SBSC_SDWCR_A, r1 122 mov.l SBSC_SDWCR_D, r0 123 mov.l r0, @r1 124 125 mov.l SBSC_SDPCR_A, r1 126 mov.l SBSC_SDPCR_D, r0 127 mov.l r0, @r1 128 129 mov.l SBSC_RTCSR_A, r1 130 mov.l SBSC_RTCSR_D, r0 131 mov.l r0, @r1 132 133 mov.l SBSC_RTCNT_A, r1 134 mov.l SBSC_RTCNT_D, r0 135 mov.l r0, @r1 136 137 mov.l SBSC_RTCOR_A, r1 138 mov.l SBSC_RTCOR_D, r0 139 mov.l r0, @r1 140 141 mov.l SBSC_SDMR3_A1, r1 142 mov.l SBSC_SDMR3_D, r0 143 mov.b r0, @r1 144 145 mov.l SBSC_SDMR3_A2, r1 146 mov.l SBSC_SDMR3_D, r0 147 mov.b r0, @r1 148 149 mov.l SLEEP_CNT, r1 1502: tst r1, r1 151 nop 152 bf/s 2b 153 dt r1 154 155 mov.l SBSC_SDMR3_A3, r1 156 mov.l SBSC_SDMR3_D, r0 157 mov.b r0, @r1 158 159 mov.l SBSC_SDCR_A, r1 160 mov.l SBSC_SDCR_D2, r0 161 mov.l r0, @r1 162 163 mov.l CCR_A, r1 164 mov.l CCR_D, r0 165 mov.l r0, @r1 166 167 ! BL bit off (init = ON) (?!?) 168 169 stc sr, r0 ! BL bit off(init=ON) 170 mov.l SR_MASK_D, r1 171 and r1, r0 172 ldc r0, sr 173 174 rts 175 mov #0, r0 176 177 .align 2 178 179DRVCRA_A: .long DRVCRA 180DRVCRB_A: .long DRVCRB 181DRVCRA_D: .long 0x4555 182DRVCRB_D: .long 0x0005 183 184RWTCSR_A: .long RWTCSR 185RWTCNT_A: .long RWTCNT 186FRQCR_A: .long FRQCR 187RWTCSR_D1: .long 0xa507 188RWTCSR_D2: .long 0xa504 189RWTCNT_D: .long 0x5a00 190FRQCR_D: .long 0x0b04474a 191 192SBSC_SDCR_A: .long SBSC_SDCR 193SBSC_SDWCR_A: .long SBSC_SDWCR 194SBSC_SDPCR_A: .long SBSC_SDPCR 195SBSC_RTCSR_A: .long SBSC_RTCSR 196SBSC_RTCNT_A: .long SBSC_RTCNT 197SBSC_RTCOR_A: .long SBSC_RTCOR 198SBSC_SDMR3_A1: .long 0xfe510000 199SBSC_SDMR3_A2: .long 0xfe500242 200SBSC_SDMR3_A3: .long 0xfe5c0042 201 202SBSC_SDCR_D1: .long 0x92810112 203SBSC_SDCR_D2: .long 0x92810912 204SBSC_SDWCR_D: .long 0x05162482 205SBSC_SDPCR_D: .long 0x00300087 206SBSC_RTCSR_D: .long 0xa55a0212 207SBSC_RTCNT_D: .long 0xa55a0000 208SBSC_RTCOR_D: .long 0xa55a0040 209SBSC_SDMR3_D: .long 0x00 210 211CMNCR_A: .long CMNCR 212CS0BCR_A: .long CS0BCR 213CS4BCR_A: .long CS4BCR 214CS5ABCR_A: .long CS5ABCR 215CS5BBCR_A: .long CS5BBCR 216CS6ABCR_A: .long CS6ABCR 217CS6BBCR_A: .long CS6BBCR 218CS0WCR_A: .long CS0WCR 219CS4WCR_A: .long CS4WCR 220CS5AWCR_A: .long CS5AWCR 221CS5BWCR_A: .long CS5BWCR 222CS6AWCR_A: .long CS6AWCR 223CS6BWCR_A: .long CS6BWCR 224 225CMNCR_D: .long 0x00000013 226CS0BCR_D: .long 0x24920400 227CS4BCR_D: .long 0x24920400 228CS5ABCR_D: .long 0x24920400 229CS5BBCR_D: .long 0x7fff0600 230CS6ABCR_D: .long 0x24920400 231CS6BBCR_D: .long 0x24920600 232CS0WCR_D: .long 0x00000480 233CS4WCR_D: .long 0x00000480 234CS5AWCR_D: .long 0x00000380 235CS5BWCR_D: .long 0x00000600 236CS6AWCR_D: .long 0x00000300 237CS6BWCR_D: .long 0x00000540 238 239CCR_A: .long 0xff00001c 240CCR_D: .long 0x0000090d 241 242SLEEP_CNT: .long 0x00000800 243SR_MASK_D: .long 0xEFFFFF0F 244