xref: /openbmc/u-boot/board/nvidia/p2371-0000/pinmux-config-p2371-0000.h (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2f05fa678SStephen Warren /*
3f05fa678SStephen Warren  * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
4f05fa678SStephen Warren  */
5f05fa678SStephen Warren 
6f05fa678SStephen Warren /*
7f05fa678SStephen Warren  * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
8f05fa678SStephen Warren  *
9f05fa678SStephen Warren  * To generate this file, use the tegra-pinmux-scripts tool available from
10f05fa678SStephen Warren  * https://github.com/NVIDIA/tegra-pinmux-scripts
11f05fa678SStephen Warren  * Run "board-to-uboot.py p2371-0000".
12f05fa678SStephen Warren  */
13f05fa678SStephen Warren 
14f05fa678SStephen Warren #ifndef _PINMUX_CONFIG_P2371_0000_H_
15f05fa678SStephen Warren #define _PINMUX_CONFIG_P2371_0000_H_
16f05fa678SStephen Warren 
1701a97a11SStephen Warren #define GPIO_INIT(_port, _gpio, _init)			\
18f05fa678SStephen Warren 	{						\
1901a97a11SStephen Warren 		.gpio	= TEGRA_GPIO(_port, _gpio),	\
20f05fa678SStephen Warren 		.init	= TEGRA_GPIO_INIT_##_init,	\
21f05fa678SStephen Warren 	}
22f05fa678SStephen Warren 
23f05fa678SStephen Warren static const struct tegra_gpio_config p2371_0000_gpio_inits[] = {
2401a97a11SStephen Warren 	/*        port, pin, init_val */
2501a97a11SStephen Warren 	GPIO_INIT(A,    5,   IN),
2601a97a11SStephen Warren 	GPIO_INIT(E,    4,   OUT0),
2701a97a11SStephen Warren 	GPIO_INIT(E,    6,   IN),
2801a97a11SStephen Warren 	GPIO_INIT(G,    0,   IN),
2901a97a11SStephen Warren 	GPIO_INIT(G,    3,   OUT0),
3001a97a11SStephen Warren 	GPIO_INIT(H,    0,   OUT0),
3101a97a11SStephen Warren 	GPIO_INIT(H,    2,   IN),
3201a97a11SStephen Warren 	GPIO_INIT(H,    3,   OUT0),
3301a97a11SStephen Warren 	GPIO_INIT(H,    4,   OUT0),
3401a97a11SStephen Warren 	GPIO_INIT(H,    5,   IN),
3501a97a11SStephen Warren 	GPIO_INIT(H,    6,   OUT0),
3601a97a11SStephen Warren 	GPIO_INIT(H,    7,   OUT0),
3701a97a11SStephen Warren 	GPIO_INIT(I,    0,   OUT0),
3801a97a11SStephen Warren 	GPIO_INIT(I,    1,   IN),
3901a97a11SStephen Warren 	GPIO_INIT(I,    2,   OUT0),
4001a97a11SStephen Warren 	GPIO_INIT(I,    3,   OUT0),
4101a97a11SStephen Warren 	GPIO_INIT(K,    4,   IN),
4201a97a11SStephen Warren 	GPIO_INIT(K,    5,   OUT0),
4301a97a11SStephen Warren 	GPIO_INIT(K,    6,   IN),
4401a97a11SStephen Warren 	GPIO_INIT(K,    7,   OUT0),
4501a97a11SStephen Warren 	GPIO_INIT(L,    0,   OUT0),
4601a97a11SStephen Warren 	GPIO_INIT(S,    4,   OUT0),
4701a97a11SStephen Warren 	GPIO_INIT(S,    5,   OUT0),
4801a97a11SStephen Warren 	GPIO_INIT(S,    6,   OUT0),
4901a97a11SStephen Warren 	GPIO_INIT(S,    7,   OUT0),
5001a97a11SStephen Warren 	GPIO_INIT(T,    0,   OUT0),
5101a97a11SStephen Warren 	GPIO_INIT(T,    1,   OUT0),
5201a97a11SStephen Warren 	GPIO_INIT(V,    1,   OUT0),
5301a97a11SStephen Warren 	GPIO_INIT(V,    2,   OUT0),
5401a97a11SStephen Warren 	GPIO_INIT(V,    5,   OUT0),
5501a97a11SStephen Warren 	GPIO_INIT(V,    6,   OUT0),
5601a97a11SStephen Warren 	GPIO_INIT(V,    7,   OUT1),
5701a97a11SStephen Warren 	GPIO_INIT(X,    0,   IN),
5801a97a11SStephen Warren 	GPIO_INIT(X,    1,   IN),
5901a97a11SStephen Warren 	GPIO_INIT(X,    2,   IN),
6001a97a11SStephen Warren 	GPIO_INIT(X,    3,   IN),
6101a97a11SStephen Warren 	GPIO_INIT(X,    4,   IN),
6201a97a11SStephen Warren 	GPIO_INIT(X,    5,   IN),
6301a97a11SStephen Warren 	GPIO_INIT(X,    6,   IN),
6401a97a11SStephen Warren 	GPIO_INIT(X,    7,   IN),
6501a97a11SStephen Warren 	GPIO_INIT(Y,    1,   IN),
6601a97a11SStephen Warren 	GPIO_INIT(Z,    0,   IN),
6701a97a11SStephen Warren 	GPIO_INIT(Z,    4,   OUT0),
6801a97a11SStephen Warren 	GPIO_INIT(BB,   2,   OUT0),
6901a97a11SStephen Warren 	GPIO_INIT(BB,   3,   OUT0),
7001a97a11SStephen Warren 	GPIO_INIT(CC,   1,   IN),
7101a97a11SStephen Warren 	GPIO_INIT(CC,   6,   IN),
7201a97a11SStephen Warren 	GPIO_INIT(CC,   7,   OUT0),
73f05fa678SStephen Warren };
74f05fa678SStephen Warren 
75f05fa678SStephen Warren #define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv)	\
76f05fa678SStephen Warren 	{							\
77f05fa678SStephen Warren 		.pingrp		= PMUX_PINGRP_##_pingrp,	\
78f05fa678SStephen Warren 		.func		= PMUX_FUNC_##_mux,		\
79f05fa678SStephen Warren 		.pull		= PMUX_PULL_##_pull,		\
80f05fa678SStephen Warren 		.tristate	= PMUX_TRI_##_tri,		\
81f05fa678SStephen Warren 		.io		= PMUX_PIN_##_io,		\
82f05fa678SStephen Warren 		.od		= PMUX_PIN_OD_##_od,		\
83f05fa678SStephen Warren 		.e_io_hv	= PMUX_PIN_E_IO_HV_##_e_io_hv,	\
84f05fa678SStephen Warren 		.lock		= PMUX_PIN_LOCK_DEFAULT,	\
85f05fa678SStephen Warren 	}
86f05fa678SStephen Warren 
87f05fa678SStephen Warren static const struct pmux_pingrp_config p2371_0000_pingrps[] = {
88f05fa678SStephen Warren 	/*     pingrp,               mux,        pull,   tri,      e_input, od,      e_io_hv */
89f05fa678SStephen Warren 	PINCFG(PEX_L0_RST_N_PA0,     PE0,        NORMAL, NORMAL,   OUTPUT,  DISABLE, HIGH),
90f05fa678SStephen Warren 	PINCFG(PEX_L0_CLKREQ_N_PA1,  PE0,        NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
91f05fa678SStephen Warren 	PINCFG(PEX_WAKE_N_PA2,       PE,         NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
92f05fa678SStephen Warren 	PINCFG(PEX_L1_RST_N_PA3,     PE1,        NORMAL, NORMAL,   OUTPUT,  DISABLE, HIGH),
93f05fa678SStephen Warren 	PINCFG(PEX_L1_CLKREQ_N_PA4,  PE1,        NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
94f05fa678SStephen Warren 	PINCFG(SATA_LED_ACTIVE_PA5,  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
95f05fa678SStephen Warren 	PINCFG(PA6,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
96f05fa678SStephen Warren 	PINCFG(DAP1_FS_PB0,          I2S1,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
97f05fa678SStephen Warren 	PINCFG(DAP1_DIN_PB1,         I2S1,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
98f05fa678SStephen Warren 	PINCFG(DAP1_DOUT_PB2,        I2S1,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
99f05fa678SStephen Warren 	PINCFG(DAP1_SCLK_PB3,        I2S1,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
100f05fa678SStephen Warren 	PINCFG(SPI2_MOSI_PB4,        RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
101f05fa678SStephen Warren 	PINCFG(SPI2_MISO_PB5,        RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
102f05fa678SStephen Warren 	PINCFG(SPI2_SCK_PB6,         RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
103f05fa678SStephen Warren 	PINCFG(SPI2_CS0_PB7,         RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
104f05fa678SStephen Warren 	PINCFG(SPI1_MOSI_PC0,        SPI1,       DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
105f05fa678SStephen Warren 	PINCFG(SPI1_MISO_PC1,        SPI1,       DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
106f05fa678SStephen Warren 	PINCFG(SPI1_SCK_PC2,         SPI1,       DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
107f05fa678SStephen Warren 	PINCFG(SPI1_CS0_PC3,         SPI1,       UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
108f05fa678SStephen Warren 	PINCFG(SPI1_CS1_PC4,         SPI1,       UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
109f05fa678SStephen Warren 	PINCFG(SPI4_SCK_PC5,         SPI4,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
110f05fa678SStephen Warren 	PINCFG(SPI4_CS0_PC6,         SPI4,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
111f05fa678SStephen Warren 	PINCFG(SPI4_MOSI_PC7,        SPI4,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
112f05fa678SStephen Warren 	PINCFG(SPI4_MISO_PD0,        SPI4,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
113f05fa678SStephen Warren 	PINCFG(UART3_TX_PD1,         UARTC,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
114f05fa678SStephen Warren 	PINCFG(UART3_RX_PD2,         UARTC,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
115f05fa678SStephen Warren 	PINCFG(UART3_RTS_PD3,        UARTC,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
116f05fa678SStephen Warren 	PINCFG(UART3_CTS_PD4,        UARTC,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
117f05fa678SStephen Warren 	PINCFG(DMIC1_CLK_PE0,        DMIC1,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
118f05fa678SStephen Warren 	PINCFG(DMIC1_DAT_PE1,        DMIC1,      DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
119f05fa678SStephen Warren 	PINCFG(DMIC2_CLK_PE2,        DMIC2,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
120f05fa678SStephen Warren 	PINCFG(DMIC2_DAT_PE3,        DMIC2,      DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
121f05fa678SStephen Warren 	PINCFG(DMIC3_CLK_PE4,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
122f05fa678SStephen Warren 	PINCFG(DMIC3_DAT_PE5,        RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
123f05fa678SStephen Warren 	PINCFG(PE6,                  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
124f05fa678SStephen Warren 	PINCFG(PE7,                  PWM3,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
125f05fa678SStephen Warren 	PINCFG(GEN3_I2C_SCL_PF0,     I2C3,       NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
126f05fa678SStephen Warren 	PINCFG(GEN3_I2C_SDA_PF1,     I2C3,       NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
127f05fa678SStephen Warren 	PINCFG(UART2_TX_PG0,         DEFAULT,    NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
128f05fa678SStephen Warren 	PINCFG(UART2_RX_PG1,         UARTB,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
129f05fa678SStephen Warren 	PINCFG(UART2_RTS_PG2,        RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
130f05fa678SStephen Warren 	PINCFG(UART2_CTS_PG3,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
131f05fa678SStephen Warren 	PINCFG(WIFI_EN_PH0,          DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
132f05fa678SStephen Warren 	PINCFG(WIFI_RST_PH1,         RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
133f05fa678SStephen Warren 	PINCFG(WIFI_WAKE_AP_PH2,     DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
134f05fa678SStephen Warren 	PINCFG(AP_WAKE_BT_PH3,       DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
135f05fa678SStephen Warren 	PINCFG(BT_RST_PH4,           DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
136f05fa678SStephen Warren 	PINCFG(BT_WAKE_AP_PH5,       DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
137f05fa678SStephen Warren 	PINCFG(PH6,                  DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
138f05fa678SStephen Warren 	PINCFG(AP_WAKE_NFC_PH7,      DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
139f05fa678SStephen Warren 	PINCFG(NFC_EN_PI0,           DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
140f05fa678SStephen Warren 	PINCFG(NFC_INT_PI1,          DEFAULT,    NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
141f05fa678SStephen Warren 	PINCFG(GPS_EN_PI2,           DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
142f05fa678SStephen Warren 	PINCFG(GPS_RST_PI3,          DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
143f05fa678SStephen Warren 	PINCFG(UART4_TX_PI4,         UARTD,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
144f05fa678SStephen Warren 	PINCFG(UART4_RX_PI5,         UARTD,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
145f05fa678SStephen Warren 	PINCFG(UART4_RTS_PI6,        UARTD,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
146f05fa678SStephen Warren 	PINCFG(UART4_CTS_PI7,        UARTD,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
147f05fa678SStephen Warren 	PINCFG(GEN1_I2C_SDA_PJ0,     I2C1,       NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
148f05fa678SStephen Warren 	PINCFG(GEN1_I2C_SCL_PJ1,     I2C1,       NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
149f05fa678SStephen Warren 	PINCFG(GEN2_I2C_SCL_PJ2,     I2C2,       NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
150f05fa678SStephen Warren 	PINCFG(GEN2_I2C_SDA_PJ3,     I2C2,       NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
151f05fa678SStephen Warren 	PINCFG(DAP4_FS_PJ4,          I2S4B,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
152f05fa678SStephen Warren 	PINCFG(DAP4_DIN_PJ5,         I2S4B,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
153f05fa678SStephen Warren 	PINCFG(DAP4_DOUT_PJ6,        I2S4B,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
154f05fa678SStephen Warren 	PINCFG(DAP4_SCLK_PJ7,        I2S4B,      NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
155f05fa678SStephen Warren 	PINCFG(PK0,                  I2S5B,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
156f05fa678SStephen Warren 	PINCFG(PK1,                  I2S5B,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
157f05fa678SStephen Warren 	PINCFG(PK2,                  I2S5B,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
158f05fa678SStephen Warren 	PINCFG(PK3,                  I2S5B,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
159f05fa678SStephen Warren 	PINCFG(PK4,                  DEFAULT,    NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
160f05fa678SStephen Warren 	PINCFG(PK5,                  DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
161f05fa678SStephen Warren 	PINCFG(PK6,                  DEFAULT,    NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
162f05fa678SStephen Warren 	PINCFG(PK7,                  DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
163f05fa678SStephen Warren 	PINCFG(PL0,                  DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
164f05fa678SStephen Warren 	PINCFG(PL1,                  SOC,        UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
165f05fa678SStephen Warren 	PINCFG(SDMMC1_CLK_PM0,       SDMMC1,     NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
166f05fa678SStephen Warren 	PINCFG(SDMMC1_CMD_PM1,       SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
167f05fa678SStephen Warren 	PINCFG(SDMMC1_DAT3_PM2,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
168f05fa678SStephen Warren 	PINCFG(SDMMC1_DAT2_PM3,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
169f05fa678SStephen Warren 	PINCFG(SDMMC1_DAT1_PM4,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
170f05fa678SStephen Warren 	PINCFG(SDMMC1_DAT0_PM5,      SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
171f05fa678SStephen Warren 	PINCFG(SDMMC3_CLK_PP0,       SDMMC3,     NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
172f05fa678SStephen Warren 	PINCFG(SDMMC3_CMD_PP1,       SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
173f05fa678SStephen Warren 	PINCFG(SDMMC3_DAT3_PP2,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
174f05fa678SStephen Warren 	PINCFG(SDMMC3_DAT2_PP3,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
175f05fa678SStephen Warren 	PINCFG(SDMMC3_DAT1_PP4,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
176f05fa678SStephen Warren 	PINCFG(SDMMC3_DAT0_PP5,      SDMMC3,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
177f05fa678SStephen Warren 	PINCFG(CAM1_MCLK_PS0,        EXTPERIPH3, NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
178f05fa678SStephen Warren 	PINCFG(CAM2_MCLK_PS1,        EXTPERIPH3, NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
179f05fa678SStephen Warren 	PINCFG(CAM_I2C_SCL_PS2,      I2CVI,      NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
180f05fa678SStephen Warren 	PINCFG(CAM_I2C_SDA_PS3,      I2CVI,      NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
181f05fa678SStephen Warren 	PINCFG(CAM_RST_PS4,          DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
182f05fa678SStephen Warren 	PINCFG(CAM_AF_EN_PS5,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
183f05fa678SStephen Warren 	PINCFG(CAM_FLASH_EN_PS6,     DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
184f05fa678SStephen Warren 	PINCFG(CAM1_PWDN_PS7,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
185f05fa678SStephen Warren 	PINCFG(CAM2_PWDN_PT0,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
186f05fa678SStephen Warren 	PINCFG(CAM1_STROBE_PT1,      DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
187f05fa678SStephen Warren 	PINCFG(UART1_TX_PU0,         UARTA,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
188f05fa678SStephen Warren 	PINCFG(UART1_RX_PU1,         UARTA,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
189f05fa678SStephen Warren 	PINCFG(UART1_RTS_PU2,        UARTA,      NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
190f05fa678SStephen Warren 	PINCFG(UART1_CTS_PU3,        UARTA,      UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
191f05fa678SStephen Warren 	PINCFG(LCD_BL_PWM_PV0,       PWM0,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
192f05fa678SStephen Warren 	PINCFG(LCD_BL_EN_PV1,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
193f05fa678SStephen Warren 	PINCFG(LCD_RST_PV2,          DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
194f05fa678SStephen Warren 	PINCFG(LCD_GPIO1_PV3,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
195f05fa678SStephen Warren 	PINCFG(LCD_GPIO2_PV4,        PWM1,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
196f05fa678SStephen Warren 	PINCFG(AP_READY_PV5,         DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
197f05fa678SStephen Warren 	PINCFG(TOUCH_RST_PV6,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
198f05fa678SStephen Warren 	PINCFG(TOUCH_CLK_PV7,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
199f05fa678SStephen Warren 	PINCFG(MODEM_WAKE_AP_PX0,    DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
200f05fa678SStephen Warren 	PINCFG(TOUCH_INT_PX1,        DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
201f05fa678SStephen Warren 	PINCFG(MOTION_INT_PX2,       DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
202f05fa678SStephen Warren 	PINCFG(ALS_PROX_INT_PX3,     DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
203f05fa678SStephen Warren 	PINCFG(TEMP_ALERT_PX4,       DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
204f05fa678SStephen Warren 	PINCFG(BUTTON_POWER_ON_PX5,  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
205f05fa678SStephen Warren 	PINCFG(BUTTON_VOL_UP_PX6,    DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
206f05fa678SStephen Warren 	PINCFG(BUTTON_VOL_DOWN_PX7,  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
207f05fa678SStephen Warren 	PINCFG(BUTTON_SLIDE_SW_PY0,  RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
208f05fa678SStephen Warren 	PINCFG(BUTTON_HOME_PY1,      DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
209f05fa678SStephen Warren 	PINCFG(LCD_TE_PY2,           DISPLAYA,   DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
210f05fa678SStephen Warren 	PINCFG(PWR_I2C_SCL_PY3,      I2CPMU,     NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
211f05fa678SStephen Warren 	PINCFG(PWR_I2C_SDA_PY4,      I2CPMU,     NORMAL, NORMAL,   INPUT,   DISABLE, NORMAL),
212f05fa678SStephen Warren 	PINCFG(CLK_32K_OUT_PY5,      SOC,        UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
213f05fa678SStephen Warren 	PINCFG(PZ0,                  DEFAULT,    UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
214f05fa678SStephen Warren 	PINCFG(PZ1,                  SDMMC1,     UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
215f05fa678SStephen Warren 	PINCFG(PZ2,                  RSVD2,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
216f05fa678SStephen Warren 	PINCFG(PZ3,                  RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
217f05fa678SStephen Warren 	PINCFG(PZ4,                  DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
218f05fa678SStephen Warren 	PINCFG(PZ5,                  SOC,        UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
219f05fa678SStephen Warren 	PINCFG(DAP2_FS_PAA0,         I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
220f05fa678SStephen Warren 	PINCFG(DAP2_SCLK_PAA1,       I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
221f05fa678SStephen Warren 	PINCFG(DAP2_DIN_PAA2,        I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
222f05fa678SStephen Warren 	PINCFG(DAP2_DOUT_PAA3,       I2S2,       NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
223f05fa678SStephen Warren 	PINCFG(AUD_MCLK_PBB0,        AUD,        NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
224f05fa678SStephen Warren 	PINCFG(DVFS_PWM_PBB1,        CLDVFS,     NORMAL, TRISTATE, OUTPUT,  DISABLE, DEFAULT),
225f05fa678SStephen Warren 	PINCFG(DVFS_CLK_PBB2,        DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
226f05fa678SStephen Warren 	PINCFG(GPIO_X1_AUD_PBB3,     DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
227f05fa678SStephen Warren 	PINCFG(GPIO_X3_AUD_PBB4,     RSVD0,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
228f05fa678SStephen Warren 	PINCFG(HDMI_CEC_PCC0,        CEC,        NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
229f05fa678SStephen Warren 	PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, NORMAL),
230f05fa678SStephen Warren 	PINCFG(SPDIF_OUT_PCC2,       RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
231f05fa678SStephen Warren 	PINCFG(SPDIF_IN_PCC3,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
232f05fa678SStephen Warren 	PINCFG(USB_VBUS_EN0_PCC4,    USB,        NORMAL, NORMAL,   INPUT,   DISABLE, HIGH),
233f05fa678SStephen Warren 	PINCFG(USB_VBUS_EN1_PCC5,    RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, NORMAL),
234f05fa678SStephen Warren 	PINCFG(DP_HPD0_PCC6,         DEFAULT,    DOWN,   NORMAL,   INPUT,   DISABLE, DEFAULT),
235f05fa678SStephen Warren 	PINCFG(PCC7,                 DEFAULT,    NORMAL, NORMAL,   OUTPUT,  DISABLE, NORMAL),
236f05fa678SStephen Warren 	PINCFG(SPI2_CS1_PDD0,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
237f05fa678SStephen Warren 	PINCFG(QSPI_SCK_PEE0,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
238f05fa678SStephen Warren 	PINCFG(QSPI_CS_N_PEE1,       RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
239f05fa678SStephen Warren 	PINCFG(QSPI_IO0_PEE2,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
240f05fa678SStephen Warren 	PINCFG(QSPI_IO1_PEE3,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
241f05fa678SStephen Warren 	PINCFG(QSPI_IO2_PEE4,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
242f05fa678SStephen Warren 	PINCFG(QSPI_IO3_PEE5,        RSVD1,      DOWN,   TRISTATE, OUTPUT,  DISABLE, DEFAULT),
243f05fa678SStephen Warren 	PINCFG(CORE_PWR_REQ,         CORE,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
244f05fa678SStephen Warren 	PINCFG(CPU_PWR_REQ,          CPU,        NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
245f05fa678SStephen Warren 	PINCFG(PWR_INT_N,            PMI,        UP,     NORMAL,   INPUT,   DISABLE, DEFAULT),
246f05fa678SStephen Warren 	PINCFG(CLK_32K_IN,           CLK,        NORMAL, NORMAL,   INPUT,   DISABLE, DEFAULT),
247f05fa678SStephen Warren 	PINCFG(JTAG_RTCK,            JTAG,       NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
248f05fa678SStephen Warren 	PINCFG(CLK_REQ,              SYS,        NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
249f05fa678SStephen Warren 	PINCFG(SHUTDOWN,             SHUTDOWN,   NORMAL, NORMAL,   OUTPUT,  DISABLE, DEFAULT),
250f05fa678SStephen Warren };
251f05fa678SStephen Warren 
252f05fa678SStephen Warren #define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
253f05fa678SStephen Warren 	{						\
254f05fa678SStephen Warren 		.drvgrp = PMUX_DRVGRP_##_drvgrp,	\
255f05fa678SStephen Warren 		.slwf   = _slwf,			\
256f05fa678SStephen Warren 		.slwr   = _slwr,			\
257f05fa678SStephen Warren 		.drvup  = _drvup,			\
258f05fa678SStephen Warren 		.drvdn  = _drvdn,			\
259f05fa678SStephen Warren 		.lpmd   = PMUX_LPMD_##_lpmd,		\
260f05fa678SStephen Warren 		.schmt  = PMUX_SCHMT_##_schmt,		\
261f05fa678SStephen Warren 		.hsm    = PMUX_HSM_##_hsm,		\
262f05fa678SStephen Warren 	}
263f05fa678SStephen Warren 
264f05fa678SStephen Warren static const struct pmux_drvgrp_config p2371_0000_drvgrps[] = {
265f05fa678SStephen Warren };
266f05fa678SStephen Warren 
267f05fa678SStephen Warren #endif /* PINMUX_CONFIG_P2371_0000_H */
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