1*37fc0ed2SRob Herring /* 2*37fc0ed2SRob Herring * Copyright 2010-2011 Calxeda, Inc. 3*37fc0ed2SRob Herring * 4*37fc0ed2SRob Herring * This program is free software; you can redistribute it and/or modify it 5*37fc0ed2SRob Herring * under the terms of the GNU General Public License as published by the Free 6*37fc0ed2SRob Herring * Software Foundation; either version 2 of the License, or (at your option) 7*37fc0ed2SRob Herring * any later version. 8*37fc0ed2SRob Herring * 9*37fc0ed2SRob Herring * This program is distributed in the hope it will be useful, but WITHOUT 10*37fc0ed2SRob Herring * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*37fc0ed2SRob Herring * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*37fc0ed2SRob Herring * more details. 13*37fc0ed2SRob Herring * 14*37fc0ed2SRob Herring * You should have received a copy of the GNU General Public License along with 15*37fc0ed2SRob Herring * this program. If not, see <http://www.gnu.org/licenses/>. 16*37fc0ed2SRob Herring */ 17*37fc0ed2SRob Herring 18*37fc0ed2SRob Herring #include <common.h> 19*37fc0ed2SRob Herring #include <ahci.h> 20*37fc0ed2SRob Herring #include <scsi.h> 21*37fc0ed2SRob Herring 22*37fc0ed2SRob Herring #include <asm/sizes.h> 23*37fc0ed2SRob Herring 24*37fc0ed2SRob Herring DECLARE_GLOBAL_DATA_PTR; 25*37fc0ed2SRob Herring 26*37fc0ed2SRob Herring /* 27*37fc0ed2SRob Herring * Miscellaneous platform dependent initialisations 28*37fc0ed2SRob Herring */ 29*37fc0ed2SRob Herring int board_init(void) 30*37fc0ed2SRob Herring { 31*37fc0ed2SRob Herring icache_enable(); 32*37fc0ed2SRob Herring 33*37fc0ed2SRob Herring return 0; 34*37fc0ed2SRob Herring } 35*37fc0ed2SRob Herring 36*37fc0ed2SRob Herring int misc_init_r(void) 37*37fc0ed2SRob Herring { 38*37fc0ed2SRob Herring ahci_init(0xffe08000); 39*37fc0ed2SRob Herring scsi_scan(1); 40*37fc0ed2SRob Herring return 0; 41*37fc0ed2SRob Herring } 42*37fc0ed2SRob Herring 43*37fc0ed2SRob Herring int dram_init(void) 44*37fc0ed2SRob Herring { 45*37fc0ed2SRob Herring gd->ram_size = SZ_512M; 46*37fc0ed2SRob Herring return 0; 47*37fc0ed2SRob Herring } 48*37fc0ed2SRob Herring 49*37fc0ed2SRob Herring void dram_init_banksize(void) 50*37fc0ed2SRob Herring { 51*37fc0ed2SRob Herring gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 52*37fc0ed2SRob Herring gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 53*37fc0ed2SRob Herring } 54*37fc0ed2SRob Herring 55*37fc0ed2SRob Herring void reset_cpu(ulong addr) 56*37fc0ed2SRob Herring { 57*37fc0ed2SRob Herring } 58