137fc0ed2SRob Herring /* 237fc0ed2SRob Herring * Copyright 2010-2011 Calxeda, Inc. 337fc0ed2SRob Herring * 437fc0ed2SRob Herring * This program is free software; you can redistribute it and/or modify it 537fc0ed2SRob Herring * under the terms of the GNU General Public License as published by the Free 637fc0ed2SRob Herring * Software Foundation; either version 2 of the License, or (at your option) 737fc0ed2SRob Herring * any later version. 837fc0ed2SRob Herring * 937fc0ed2SRob Herring * This program is distributed in the hope it will be useful, but WITHOUT 1037fc0ed2SRob Herring * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1137fc0ed2SRob Herring * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1237fc0ed2SRob Herring * more details. 1337fc0ed2SRob Herring * 1437fc0ed2SRob Herring * You should have received a copy of the GNU General Public License along with 1537fc0ed2SRob Herring * this program. If not, see <http://www.gnu.org/licenses/>. 1637fc0ed2SRob Herring */ 1737fc0ed2SRob Herring 1837fc0ed2SRob Herring #include <common.h> 1937fc0ed2SRob Herring #include <ahci.h> 20bd0d90efSRob Herring #include <netdev.h> 2137fc0ed2SRob Herring #include <scsi.h> 2237fc0ed2SRob Herring 2337fc0ed2SRob Herring #include <asm/sizes.h> 24877012dfSRob Herring #include <asm/io.h> 2537fc0ed2SRob Herring 26*0c34e69fSRob Herring #define HB_SREG_A9_PWR_REQ 0xfff3cf00 27*0c34e69fSRob Herring #define HB_PWR_SUSPEND 0 28*0c34e69fSRob Herring #define HB_PWR_SOFT_RESET 1 29*0c34e69fSRob Herring #define HB_PWR_HARD_RESET 2 30*0c34e69fSRob Herring #define HB_PWR_SHUTDOWN 3 31*0c34e69fSRob Herring 3237fc0ed2SRob Herring DECLARE_GLOBAL_DATA_PTR; 3337fc0ed2SRob Herring 3437fc0ed2SRob Herring /* 3537fc0ed2SRob Herring * Miscellaneous platform dependent initialisations 3637fc0ed2SRob Herring */ 3737fc0ed2SRob Herring int board_init(void) 3837fc0ed2SRob Herring { 3937fc0ed2SRob Herring icache_enable(); 4037fc0ed2SRob Herring 4137fc0ed2SRob Herring return 0; 4237fc0ed2SRob Herring } 4337fc0ed2SRob Herring 449a420986SRob Herring /* We know all the init functions have been run now */ 459a420986SRob Herring int board_eth_init(bd_t *bis) 469a420986SRob Herring { 479a420986SRob Herring int rc = 0; 489a420986SRob Herring 499a420986SRob Herring #ifdef CONFIG_CALXEDA_XGMAC 509a420986SRob Herring rc += calxedaxgmac_initialize(0, 0xfff50000); 519a420986SRob Herring rc += calxedaxgmac_initialize(1, 0xfff51000); 529a420986SRob Herring #endif 539a420986SRob Herring return rc; 549a420986SRob Herring } 559a420986SRob Herring 5637fc0ed2SRob Herring int misc_init_r(void) 5737fc0ed2SRob Herring { 5837fc0ed2SRob Herring ahci_init(0xffe08000); 5937fc0ed2SRob Herring scsi_scan(1); 6037fc0ed2SRob Herring return 0; 6137fc0ed2SRob Herring } 6237fc0ed2SRob Herring 6337fc0ed2SRob Herring int dram_init(void) 6437fc0ed2SRob Herring { 6537fc0ed2SRob Herring gd->ram_size = SZ_512M; 6637fc0ed2SRob Herring return 0; 6737fc0ed2SRob Herring } 6837fc0ed2SRob Herring 6937fc0ed2SRob Herring void dram_init_banksize(void) 7037fc0ed2SRob Herring { 7137fc0ed2SRob Herring gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 7237fc0ed2SRob Herring gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 7337fc0ed2SRob Herring } 7437fc0ed2SRob Herring 7537fc0ed2SRob Herring void reset_cpu(ulong addr) 7637fc0ed2SRob Herring { 77*0c34e69fSRob Herring writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); 78*0c34e69fSRob Herring asm(" wfi"); 7937fc0ed2SRob Herring } 80