1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
250dcf89dSDirk Eibach /*
350dcf89dSDirk Eibach * (C) Copyright 2014
4d38826a3SMario Six * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
550dcf89dSDirk Eibach */
650dcf89dSDirk Eibach
750dcf89dSDirk Eibach #include <common.h>
850dcf89dSDirk Eibach
950dcf89dSDirk Eibach #include <miiphy.h>
1050dcf89dSDirk Eibach
1150dcf89dSDirk Eibach enum {
1250dcf89dSDirk Eibach MIICMD_SET,
1350dcf89dSDirk Eibach MIICMD_MODIFY,
1450dcf89dSDirk Eibach MIICMD_VERIFY_VALUE,
1550dcf89dSDirk Eibach MIICMD_WAIT_FOR_VALUE,
1650dcf89dSDirk Eibach };
1750dcf89dSDirk Eibach
1850dcf89dSDirk Eibach struct mii_setupcmd {
1950dcf89dSDirk Eibach u8 token;
2050dcf89dSDirk Eibach u8 reg;
2150dcf89dSDirk Eibach u16 data;
2250dcf89dSDirk Eibach u16 mask;
2350dcf89dSDirk Eibach u32 timeout;
2450dcf89dSDirk Eibach };
2550dcf89dSDirk Eibach
2650dcf89dSDirk Eibach /*
2750dcf89dSDirk Eibach * verify we are talking to a 88e1518
2850dcf89dSDirk Eibach */
2950dcf89dSDirk Eibach struct mii_setupcmd verify_88e1518[] = {
3050dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
3150dcf89dSDirk Eibach { MIICMD_VERIFY_VALUE, 2, 0x0141, 0xffff },
3250dcf89dSDirk Eibach { MIICMD_VERIFY_VALUE, 3, 0x0dd0, 0xfff0 },
3350dcf89dSDirk Eibach };
3450dcf89dSDirk Eibach
3550dcf89dSDirk Eibach /*
3650dcf89dSDirk Eibach * workaround for erratum mentioned in 88E1518 release notes
3750dcf89dSDirk Eibach */
3850dcf89dSDirk Eibach struct mii_setupcmd fixup_88e1518[] = {
3950dcf89dSDirk Eibach { MIICMD_SET, 22, 0x00ff },
4050dcf89dSDirk Eibach { MIICMD_SET, 17, 0x214b },
4150dcf89dSDirk Eibach { MIICMD_SET, 16, 0x2144 },
4250dcf89dSDirk Eibach { MIICMD_SET, 17, 0x0c28 },
4350dcf89dSDirk Eibach { MIICMD_SET, 16, 0x2146 },
4450dcf89dSDirk Eibach { MIICMD_SET, 17, 0xb233 },
4550dcf89dSDirk Eibach { MIICMD_SET, 16, 0x214d },
4650dcf89dSDirk Eibach { MIICMD_SET, 17, 0xcc0c },
4750dcf89dSDirk Eibach { MIICMD_SET, 16, 0x2159 },
4850dcf89dSDirk Eibach { MIICMD_SET, 22, 0x00fb },
4950dcf89dSDirk Eibach { MIICMD_SET, 7, 0xc00d },
5050dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
5150dcf89dSDirk Eibach };
5250dcf89dSDirk Eibach
5350dcf89dSDirk Eibach /*
5450dcf89dSDirk Eibach * default initialization:
5550dcf89dSDirk Eibach * - set RGMII receive timing to "receive clock transition when data stable"
5650dcf89dSDirk Eibach * - set RGMII transmit timing to "transmit clock internally delayed"
5750dcf89dSDirk Eibach * - set RGMII output impedance target to 78,8 Ohm
5850dcf89dSDirk Eibach * - run output impedance calibration
5950dcf89dSDirk Eibach * - set autonegotiation advertise to 1000FD only
6050dcf89dSDirk Eibach */
6150dcf89dSDirk Eibach struct mii_setupcmd default_88e1518[] = {
6250dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0002 },
6350dcf89dSDirk Eibach { MIICMD_MODIFY, 21, 0x0030, 0x0030 },
6450dcf89dSDirk Eibach { MIICMD_MODIFY, 25, 0x0000, 0x0003 },
6550dcf89dSDirk Eibach { MIICMD_MODIFY, 24, 0x8000, 0x8000 },
6650dcf89dSDirk Eibach { MIICMD_WAIT_FOR_VALUE, 24, 0x4000, 0x4000, 2000 },
6750dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
6850dcf89dSDirk Eibach { MIICMD_MODIFY, 4, 0x0000, 0x01e0 },
6950dcf89dSDirk Eibach { MIICMD_MODIFY, 9, 0x0200, 0x0300 },
7050dcf89dSDirk Eibach };
7150dcf89dSDirk Eibach
7250dcf89dSDirk Eibach /*
7350dcf89dSDirk Eibach * turn off CLK125 for PHY daughterboard
7450dcf89dSDirk Eibach */
7550dcf89dSDirk Eibach struct mii_setupcmd ch1fix_88e1518[] = {
7650dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0002 },
7750dcf89dSDirk Eibach { MIICMD_MODIFY, 16, 0x0006, 0x0006 },
7850dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
7950dcf89dSDirk Eibach };
8050dcf89dSDirk Eibach
8150dcf89dSDirk Eibach /*
8250dcf89dSDirk Eibach * perform copper software reset
8350dcf89dSDirk Eibach */
8450dcf89dSDirk Eibach struct mii_setupcmd swreset_88e1518[] = {
8550dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
8650dcf89dSDirk Eibach { MIICMD_MODIFY, 0, 0x8000, 0x8000 },
8750dcf89dSDirk Eibach { MIICMD_WAIT_FOR_VALUE, 0, 0x0000, 0x8000, 2000 },
8850dcf89dSDirk Eibach };
8950dcf89dSDirk Eibach
9050dcf89dSDirk Eibach /*
9150dcf89dSDirk Eibach * special one for 88E1514:
9250dcf89dSDirk Eibach * Force SGMII to Copper mode
9350dcf89dSDirk Eibach */
9450dcf89dSDirk Eibach struct mii_setupcmd mii_to_copper_88e1514[] = {
9550dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0012 },
9650dcf89dSDirk Eibach { MIICMD_MODIFY, 20, 0x0001, 0x0007 },
9750dcf89dSDirk Eibach { MIICMD_MODIFY, 20, 0x8000, 0x8000 },
9850dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
9950dcf89dSDirk Eibach };
10050dcf89dSDirk Eibach
10150dcf89dSDirk Eibach /*
10250dcf89dSDirk Eibach * turn off SGMII auto-negotiation
10350dcf89dSDirk Eibach */
10450dcf89dSDirk Eibach struct mii_setupcmd sgmii_autoneg_off_88e1518[] = {
10550dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0001 },
10650dcf89dSDirk Eibach { MIICMD_MODIFY, 0, 0x0000, 0x1000 },
10750dcf89dSDirk Eibach { MIICMD_MODIFY, 0, 0x8000, 0x8000 },
10850dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
10950dcf89dSDirk Eibach };
11050dcf89dSDirk Eibach
11150dcf89dSDirk Eibach /*
11250dcf89dSDirk Eibach * invert LED2 polarity
11350dcf89dSDirk Eibach */
11450dcf89dSDirk Eibach struct mii_setupcmd invert_led2_88e1514[] = {
11550dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0003 },
11650dcf89dSDirk Eibach { MIICMD_MODIFY, 17, 0x0030, 0x0010 },
11750dcf89dSDirk Eibach { MIICMD_SET, 22, 0x0000 },
11850dcf89dSDirk Eibach };
11950dcf89dSDirk Eibach
process_setupcmd(const char * bus,unsigned char addr,struct mii_setupcmd * setupcmd)12050dcf89dSDirk Eibach static int process_setupcmd(const char *bus, unsigned char addr,
12150dcf89dSDirk Eibach struct mii_setupcmd *setupcmd)
12250dcf89dSDirk Eibach {
12350dcf89dSDirk Eibach int res;
12450dcf89dSDirk Eibach u8 reg = setupcmd->reg;
12550dcf89dSDirk Eibach u16 data = setupcmd->data;
12650dcf89dSDirk Eibach u16 mask = setupcmd->mask;
12750dcf89dSDirk Eibach u32 timeout = setupcmd->timeout;
12850dcf89dSDirk Eibach u16 orig_data;
12950dcf89dSDirk Eibach unsigned long start;
13050dcf89dSDirk Eibach
13150dcf89dSDirk Eibach debug("mii %s:%u reg %2u ", bus, addr, reg);
13250dcf89dSDirk Eibach
13350dcf89dSDirk Eibach switch (setupcmd->token) {
13450dcf89dSDirk Eibach case MIICMD_MODIFY:
13550dcf89dSDirk Eibach res = miiphy_read(bus, addr, reg, &orig_data);
13650dcf89dSDirk Eibach if (res)
13750dcf89dSDirk Eibach break;
13850dcf89dSDirk Eibach debug("is %04x. (value %04x mask %04x) ", orig_data, data,
13950dcf89dSDirk Eibach mask);
14050dcf89dSDirk Eibach data = (orig_data & ~mask) | (data & mask);
14150dcf89dSDirk Eibach /* fallthrough */
14250dcf89dSDirk Eibach case MIICMD_SET:
14350dcf89dSDirk Eibach debug("=> %04x\n", data);
14450dcf89dSDirk Eibach res = miiphy_write(bus, addr, reg, data);
14550dcf89dSDirk Eibach break;
14650dcf89dSDirk Eibach case MIICMD_VERIFY_VALUE:
14750dcf89dSDirk Eibach res = miiphy_read(bus, addr, reg, &orig_data);
14850dcf89dSDirk Eibach if (res)
14950dcf89dSDirk Eibach break;
15050dcf89dSDirk Eibach if ((orig_data & mask) != (data & mask))
15150dcf89dSDirk Eibach res = -1;
15250dcf89dSDirk Eibach debug("(value %04x mask %04x) == %04x? %s\n", data, mask,
15350dcf89dSDirk Eibach orig_data, res ? "FAIL" : "PASS");
15450dcf89dSDirk Eibach break;
15550dcf89dSDirk Eibach case MIICMD_WAIT_FOR_VALUE:
15650dcf89dSDirk Eibach res = -1;
15750dcf89dSDirk Eibach start = get_timer(0);
15850dcf89dSDirk Eibach while ((res != 0) && (get_timer(start) < timeout)) {
15950dcf89dSDirk Eibach res = miiphy_read(bus, addr, reg, &orig_data);
16050dcf89dSDirk Eibach if (res)
16150dcf89dSDirk Eibach continue;
16250dcf89dSDirk Eibach if ((orig_data & mask) != (data & mask))
16350dcf89dSDirk Eibach res = -1;
16450dcf89dSDirk Eibach }
16550dcf89dSDirk Eibach debug("(value %04x mask %04x) == %04x? %s after %lu ms\n", data,
16650dcf89dSDirk Eibach mask, orig_data, res ? "FAIL" : "PASS",
16750dcf89dSDirk Eibach get_timer(start));
16850dcf89dSDirk Eibach break;
16950dcf89dSDirk Eibach default:
17050dcf89dSDirk Eibach res = -1;
17150dcf89dSDirk Eibach break;
17250dcf89dSDirk Eibach }
17350dcf89dSDirk Eibach
17450dcf89dSDirk Eibach return res;
17550dcf89dSDirk Eibach }
17650dcf89dSDirk Eibach
process_setup(const char * bus,unsigned char addr,struct mii_setupcmd * setupcmd,unsigned int count)17750dcf89dSDirk Eibach static int process_setup(const char *bus, unsigned char addr,
17850dcf89dSDirk Eibach struct mii_setupcmd *setupcmd, unsigned int count)
17950dcf89dSDirk Eibach {
18050dcf89dSDirk Eibach int res = 0;
18150dcf89dSDirk Eibach unsigned int k;
18250dcf89dSDirk Eibach
18350dcf89dSDirk Eibach for (k = 0; k < count; ++k) {
18450dcf89dSDirk Eibach res = process_setupcmd(bus, addr, &setupcmd[k]);
18550dcf89dSDirk Eibach if (res) {
18650dcf89dSDirk Eibach printf("mii cmd %u on bus %s addr %u failed, aborting setup\n",
18750dcf89dSDirk Eibach setupcmd[k].token, bus, addr);
18850dcf89dSDirk Eibach break;
18950dcf89dSDirk Eibach }
19050dcf89dSDirk Eibach }
19150dcf89dSDirk Eibach
19250dcf89dSDirk Eibach return res;
19350dcf89dSDirk Eibach }
19450dcf89dSDirk Eibach
setup_88e1518(const char * bus,unsigned char addr)19550dcf89dSDirk Eibach int setup_88e1518(const char *bus, unsigned char addr)
19650dcf89dSDirk Eibach {
19750dcf89dSDirk Eibach int res;
19850dcf89dSDirk Eibach
19950dcf89dSDirk Eibach res = process_setup(bus, addr,
20050dcf89dSDirk Eibach verify_88e1518, ARRAY_SIZE(verify_88e1518));
20150dcf89dSDirk Eibach if (res)
20250dcf89dSDirk Eibach return res;
20350dcf89dSDirk Eibach
20450dcf89dSDirk Eibach res = process_setup(bus, addr,
20550dcf89dSDirk Eibach fixup_88e1518, ARRAY_SIZE(fixup_88e1518));
20650dcf89dSDirk Eibach if (res)
20750dcf89dSDirk Eibach return res;
20850dcf89dSDirk Eibach
20950dcf89dSDirk Eibach res = process_setup(bus, addr,
21050dcf89dSDirk Eibach default_88e1518, ARRAY_SIZE(default_88e1518));
21150dcf89dSDirk Eibach if (res)
21250dcf89dSDirk Eibach return res;
21350dcf89dSDirk Eibach
21450dcf89dSDirk Eibach if (addr) {
21550dcf89dSDirk Eibach res = process_setup(bus, addr,
21650dcf89dSDirk Eibach ch1fix_88e1518, ARRAY_SIZE(ch1fix_88e1518));
21750dcf89dSDirk Eibach if (res)
21850dcf89dSDirk Eibach return res;
21950dcf89dSDirk Eibach }
22050dcf89dSDirk Eibach
22150dcf89dSDirk Eibach res = process_setup(bus, addr,
22250dcf89dSDirk Eibach swreset_88e1518, ARRAY_SIZE(swreset_88e1518));
22350dcf89dSDirk Eibach if (res)
22450dcf89dSDirk Eibach return res;
22550dcf89dSDirk Eibach
22650dcf89dSDirk Eibach return 0;
22750dcf89dSDirk Eibach }
22850dcf89dSDirk Eibach
setup_88e1514(const char * bus,unsigned char addr)22950dcf89dSDirk Eibach int setup_88e1514(const char *bus, unsigned char addr)
23050dcf89dSDirk Eibach {
23150dcf89dSDirk Eibach int res;
23250dcf89dSDirk Eibach
23350dcf89dSDirk Eibach res = process_setup(bus, addr,
23450dcf89dSDirk Eibach verify_88e1518, ARRAY_SIZE(verify_88e1518));
23550dcf89dSDirk Eibach if (res)
23650dcf89dSDirk Eibach return res;
23750dcf89dSDirk Eibach
23850dcf89dSDirk Eibach res = process_setup(bus, addr,
23950dcf89dSDirk Eibach fixup_88e1518, ARRAY_SIZE(fixup_88e1518));
24050dcf89dSDirk Eibach if (res)
24150dcf89dSDirk Eibach return res;
24250dcf89dSDirk Eibach
24350dcf89dSDirk Eibach res = process_setup(bus, addr,
24450dcf89dSDirk Eibach mii_to_copper_88e1514,
24550dcf89dSDirk Eibach ARRAY_SIZE(mii_to_copper_88e1514));
24650dcf89dSDirk Eibach if (res)
24750dcf89dSDirk Eibach return res;
24850dcf89dSDirk Eibach
24950dcf89dSDirk Eibach res = process_setup(bus, addr,
25050dcf89dSDirk Eibach sgmii_autoneg_off_88e1518,
25150dcf89dSDirk Eibach ARRAY_SIZE(sgmii_autoneg_off_88e1518));
25250dcf89dSDirk Eibach if (res)
25350dcf89dSDirk Eibach return res;
25450dcf89dSDirk Eibach
25550dcf89dSDirk Eibach res = process_setup(bus, addr,
25650dcf89dSDirk Eibach invert_led2_88e1514,
25750dcf89dSDirk Eibach ARRAY_SIZE(invert_led2_88e1514));
25850dcf89dSDirk Eibach if (res)
25950dcf89dSDirk Eibach return res;
26050dcf89dSDirk Eibach
26150dcf89dSDirk Eibach res = process_setup(bus, addr,
26250dcf89dSDirk Eibach default_88e1518, ARRAY_SIZE(default_88e1518));
26350dcf89dSDirk Eibach if (res)
26450dcf89dSDirk Eibach return res;
26550dcf89dSDirk Eibach
26650dcf89dSDirk Eibach if (addr) {
26750dcf89dSDirk Eibach res = process_setup(bus, addr,
26850dcf89dSDirk Eibach ch1fix_88e1518, ARRAY_SIZE(ch1fix_88e1518));
26950dcf89dSDirk Eibach if (res)
27050dcf89dSDirk Eibach return res;
27150dcf89dSDirk Eibach }
27250dcf89dSDirk Eibach
27350dcf89dSDirk Eibach res = process_setup(bus, addr,
27450dcf89dSDirk Eibach swreset_88e1518, ARRAY_SIZE(swreset_88e1518));
27550dcf89dSDirk Eibach if (res)
27650dcf89dSDirk Eibach return res;
27750dcf89dSDirk Eibach
27850dcf89dSDirk Eibach return 0;
27950dcf89dSDirk Eibach }
280