1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
28d67c368SShengzhou Liu /*
38d67c368SShengzhou Liu * Copyright 2014 Freescale Semiconductor
48d67c368SShengzhou Liu *
58d67c368SShengzhou Liu * Freescale T2080RDB board-specific CPLD controlling supports.
68d67c368SShengzhou Liu */
78d67c368SShengzhou Liu
88d67c368SShengzhou Liu #include <common.h>
98d67c368SShengzhou Liu #include <command.h>
108d67c368SShengzhou Liu #include "cpld.h"
118d67c368SShengzhou Liu
cpld_read(unsigned int reg)128d67c368SShengzhou Liu u8 cpld_read(unsigned int reg)
138d67c368SShengzhou Liu {
148d67c368SShengzhou Liu void *p = (void *)CONFIG_SYS_CPLD_BASE;
158d67c368SShengzhou Liu
168d67c368SShengzhou Liu return in_8(p + reg);
178d67c368SShengzhou Liu }
188d67c368SShengzhou Liu
cpld_write(unsigned int reg,u8 value)198d67c368SShengzhou Liu void cpld_write(unsigned int reg, u8 value)
208d67c368SShengzhou Liu {
218d67c368SShengzhou Liu void *p = (void *)CONFIG_SYS_CPLD_BASE;
228d67c368SShengzhou Liu
238d67c368SShengzhou Liu out_8(p + reg, value);
248d67c368SShengzhou Liu }
258d67c368SShengzhou Liu
268d67c368SShengzhou Liu /* Set the boot bank to the alternate bank */
cpld_set_altbank(void)278d67c368SShengzhou Liu void cpld_set_altbank(void)
288d67c368SShengzhou Liu {
298d67c368SShengzhou Liu u8 reg = CPLD_READ(flash_csr);
308d67c368SShengzhou Liu
318d67c368SShengzhou Liu reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_ALTBANK;
328d67c368SShengzhou Liu CPLD_WRITE(flash_csr, reg);
338d67c368SShengzhou Liu CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET);
348d67c368SShengzhou Liu }
358d67c368SShengzhou Liu
368d67c368SShengzhou Liu /* Set the boot bank to the default bank */
cpld_set_defbank(void)378d67c368SShengzhou Liu void cpld_set_defbank(void)
388d67c368SShengzhou Liu {
398d67c368SShengzhou Liu u8 reg = CPLD_READ(flash_csr);
408d67c368SShengzhou Liu
418d67c368SShengzhou Liu reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_DFLTBANK;
428d67c368SShengzhou Liu CPLD_WRITE(flash_csr, reg);
438d67c368SShengzhou Liu CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET);
448d67c368SShengzhou Liu }
458d67c368SShengzhou Liu
do_cpld(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])468d67c368SShengzhou Liu int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
478d67c368SShengzhou Liu {
488d67c368SShengzhou Liu int rc = 0;
498d67c368SShengzhou Liu
508d67c368SShengzhou Liu if (argc <= 1)
518d67c368SShengzhou Liu return cmd_usage(cmdtp);
528d67c368SShengzhou Liu
538d67c368SShengzhou Liu if (strcmp(argv[1], "reset") == 0) {
548d67c368SShengzhou Liu if (strcmp(argv[2], "altbank") == 0)
558d67c368SShengzhou Liu cpld_set_altbank();
568d67c368SShengzhou Liu else
578d67c368SShengzhou Liu cpld_set_defbank();
588d67c368SShengzhou Liu } else {
598d67c368SShengzhou Liu rc = cmd_usage(cmdtp);
608d67c368SShengzhou Liu }
618d67c368SShengzhou Liu
628d67c368SShengzhou Liu return rc;
638d67c368SShengzhou Liu }
648d67c368SShengzhou Liu
658d67c368SShengzhou Liu U_BOOT_CMD(
668d67c368SShengzhou Liu cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
678d67c368SShengzhou Liu "Reset the board or alternate bank",
688d67c368SShengzhou Liu "reset: reset to default bank\n"
698d67c368SShengzhou Liu "cpld reset altbank: reset to alternate bank\n"
708d67c368SShengzhou Liu );
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