1*b19e288fSShengzhou Liu /* Copyright 2013 Freescale Semiconductor, Inc. 2*b19e288fSShengzhou Liu * 3*b19e288fSShengzhou Liu * SPDX-License-Identifier: GPL-2.0+ 4*b19e288fSShengzhou Liu */ 5*b19e288fSShengzhou Liu 6*b19e288fSShengzhou Liu #include <common.h> 7*b19e288fSShengzhou Liu #include <malloc.h> 8*b19e288fSShengzhou Liu #include <ns16550.h> 9*b19e288fSShengzhou Liu #include <nand.h> 10*b19e288fSShengzhou Liu #include <i2c.h> 11*b19e288fSShengzhou Liu #include <mmc.h> 12*b19e288fSShengzhou Liu #include <fsl_esdhc.h> 13*b19e288fSShengzhou Liu #include <spi_flash.h> 14*b19e288fSShengzhou Liu #include "../common/qixis.h" 15*b19e288fSShengzhou Liu #include "t208xqds_qixis.h" 16*b19e288fSShengzhou Liu 17*b19e288fSShengzhou Liu DECLARE_GLOBAL_DATA_PTR; 18*b19e288fSShengzhou Liu 19*b19e288fSShengzhou Liu phys_size_t get_effective_memsize(void) 20*b19e288fSShengzhou Liu { 21*b19e288fSShengzhou Liu return CONFIG_SYS_L3_SIZE; 22*b19e288fSShengzhou Liu } 23*b19e288fSShengzhou Liu 24*b19e288fSShengzhou Liu unsigned long get_board_sys_clk(void) 25*b19e288fSShengzhou Liu { 26*b19e288fSShengzhou Liu u8 sysclk_conf = QIXIS_READ(brdcfg[1]); 27*b19e288fSShengzhou Liu 28*b19e288fSShengzhou Liu switch (sysclk_conf & 0x0F) { 29*b19e288fSShengzhou Liu case QIXIS_SYSCLK_83: 30*b19e288fSShengzhou Liu return 83333333; 31*b19e288fSShengzhou Liu case QIXIS_SYSCLK_100: 32*b19e288fSShengzhou Liu return 100000000; 33*b19e288fSShengzhou Liu case QIXIS_SYSCLK_125: 34*b19e288fSShengzhou Liu return 125000000; 35*b19e288fSShengzhou Liu case QIXIS_SYSCLK_133: 36*b19e288fSShengzhou Liu return 133333333; 37*b19e288fSShengzhou Liu case QIXIS_SYSCLK_150: 38*b19e288fSShengzhou Liu return 150000000; 39*b19e288fSShengzhou Liu case QIXIS_SYSCLK_160: 40*b19e288fSShengzhou Liu return 160000000; 41*b19e288fSShengzhou Liu case QIXIS_SYSCLK_166: 42*b19e288fSShengzhou Liu return 166666666; 43*b19e288fSShengzhou Liu } 44*b19e288fSShengzhou Liu return 66666666; 45*b19e288fSShengzhou Liu } 46*b19e288fSShengzhou Liu 47*b19e288fSShengzhou Liu unsigned long get_board_ddr_clk(void) 48*b19e288fSShengzhou Liu { 49*b19e288fSShengzhou Liu u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); 50*b19e288fSShengzhou Liu 51*b19e288fSShengzhou Liu switch ((ddrclk_conf & 0x30) >> 4) { 52*b19e288fSShengzhou Liu case QIXIS_DDRCLK_100: 53*b19e288fSShengzhou Liu return 100000000; 54*b19e288fSShengzhou Liu case QIXIS_DDRCLK_125: 55*b19e288fSShengzhou Liu return 125000000; 56*b19e288fSShengzhou Liu case QIXIS_DDRCLK_133: 57*b19e288fSShengzhou Liu return 133333333; 58*b19e288fSShengzhou Liu } 59*b19e288fSShengzhou Liu return 66666666; 60*b19e288fSShengzhou Liu } 61*b19e288fSShengzhou Liu 62*b19e288fSShengzhou Liu void board_init_f(ulong bootflag) 63*b19e288fSShengzhou Liu { 64*b19e288fSShengzhou Liu u32 plat_ratio, sys_clk, ccb_clk; 65*b19e288fSShengzhou Liu ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 66*b19e288fSShengzhou Liu 67*b19e288fSShengzhou Liu /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */ 68*b19e288fSShengzhou Liu memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t)); 69*b19e288fSShengzhou Liu 70*b19e288fSShengzhou Liu /* Update GD pointer */ 71*b19e288fSShengzhou Liu gd = (gd_t *)(CONFIG_SPL_GD_ADDR); 72*b19e288fSShengzhou Liu 73*b19e288fSShengzhou Liu console_init_f(); 74*b19e288fSShengzhou Liu 75*b19e288fSShengzhou Liu /* initialize selected port with appropriate baud rate */ 76*b19e288fSShengzhou Liu sys_clk = get_board_sys_clk(); 77*b19e288fSShengzhou Liu plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; 78*b19e288fSShengzhou Liu ccb_clk = sys_clk * plat_ratio / 2; 79*b19e288fSShengzhou Liu 80*b19e288fSShengzhou Liu NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, 81*b19e288fSShengzhou Liu ccb_clk / 16 / CONFIG_BAUDRATE); 82*b19e288fSShengzhou Liu 83*b19e288fSShengzhou Liu #if defined(CONFIG_SPL_MMC_BOOT) 84*b19e288fSShengzhou Liu puts("\nSD boot...\n"); 85*b19e288fSShengzhou Liu #elif defined(CONFIG_SPL_SPI_BOOT) 86*b19e288fSShengzhou Liu puts("\nSPI boot...\n"); 87*b19e288fSShengzhou Liu #elif defined(CONFIG_SPL_NAND_BOOT) 88*b19e288fSShengzhou Liu puts("\nNAND boot...\n"); 89*b19e288fSShengzhou Liu #endif 90*b19e288fSShengzhou Liu 91*b19e288fSShengzhou Liu relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); 92*b19e288fSShengzhou Liu } 93*b19e288fSShengzhou Liu 94*b19e288fSShengzhou Liu void board_init_r(gd_t *gd, ulong dest_addr) 95*b19e288fSShengzhou Liu { 96*b19e288fSShengzhou Liu bd_t *bd; 97*b19e288fSShengzhou Liu 98*b19e288fSShengzhou Liu bd = (bd_t *)(gd + sizeof(gd_t)); 99*b19e288fSShengzhou Liu memset(bd, 0, sizeof(bd_t)); 100*b19e288fSShengzhou Liu gd->bd = bd; 101*b19e288fSShengzhou Liu bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR; 102*b19e288fSShengzhou Liu bd->bi_memsize = CONFIG_SYS_L3_SIZE; 103*b19e288fSShengzhou Liu 104*b19e288fSShengzhou Liu probecpu(); 105*b19e288fSShengzhou Liu get_clocks(); 106*b19e288fSShengzhou Liu mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, 107*b19e288fSShengzhou Liu CONFIG_SPL_RELOC_MALLOC_SIZE); 108*b19e288fSShengzhou Liu 109*b19e288fSShengzhou Liu #ifdef CONFIG_SPL_NAND_BOOT 110*b19e288fSShengzhou Liu nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 111*b19e288fSShengzhou Liu (uchar *)CONFIG_ENV_ADDR); 112*b19e288fSShengzhou Liu #endif 113*b19e288fSShengzhou Liu #ifdef CONFIG_SPL_MMC_BOOT 114*b19e288fSShengzhou Liu mmc_initialize(bd); 115*b19e288fSShengzhou Liu mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 116*b19e288fSShengzhou Liu (uchar *)CONFIG_ENV_ADDR); 117*b19e288fSShengzhou Liu #endif 118*b19e288fSShengzhou Liu #ifdef CONFIG_SPL_SPI_BOOT 119*b19e288fSShengzhou Liu spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 120*b19e288fSShengzhou Liu (uchar *)CONFIG_ENV_ADDR); 121*b19e288fSShengzhou Liu #endif 122*b19e288fSShengzhou Liu 123*b19e288fSShengzhou Liu gd->env_addr = (ulong)(CONFIG_ENV_ADDR); 124*b19e288fSShengzhou Liu gd->env_valid = 1; 125*b19e288fSShengzhou Liu 126*b19e288fSShengzhou Liu i2c_init_all(); 127*b19e288fSShengzhou Liu 128*b19e288fSShengzhou Liu gd->ram_size = initdram(0); 129*b19e288fSShengzhou Liu 130*b19e288fSShengzhou Liu #ifdef CONFIG_SPL_MMC_BOOT 131*b19e288fSShengzhou Liu mmc_boot(); 132*b19e288fSShengzhou Liu #elif defined(CONFIG_SPL_SPI_BOOT) 133*b19e288fSShengzhou Liu spi_boot(); 134*b19e288fSShengzhou Liu #elif defined(CONFIG_SPL_NAND_BOOT) 135*b19e288fSShengzhou Liu nand_boot(); 136*b19e288fSShengzhou Liu #endif 137*b19e288fSShengzhou Liu } 138