xref: /openbmc/u-boot/board/freescale/t102xqds/law.c (revision e856bdcfb49291d30b19603fc101bea096c48196)
1aba80048SShengzhou Liu /*
2aba80048SShengzhou Liu  * Copyright 2014 Freescale Semiconductor, Inc.
3aba80048SShengzhou Liu  *
4aba80048SShengzhou Liu  * SPDX-License-Identifier:	GPL-2.0+
5aba80048SShengzhou Liu  */
6aba80048SShengzhou Liu 
7aba80048SShengzhou Liu #include <common.h>
8aba80048SShengzhou Liu #include <asm/fsl_law.h>
9aba80048SShengzhou Liu #include <asm/mmu.h>
10aba80048SShengzhou Liu 
11aba80048SShengzhou Liu struct law_entry law_table[] = {
12*e856bdcfSMasahiro Yamada #ifdef CONFIG_MTD_NOR_FLASH
13aba80048SShengzhou Liu 	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
14aba80048SShengzhou Liu #endif
15aba80048SShengzhou Liu #ifdef CONFIG_SYS_BMAN_MEM_PHYS
16aba80048SShengzhou Liu 	SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
17aba80048SShengzhou Liu #endif
18aba80048SShengzhou Liu #ifdef CONFIG_SYS_QMAN_MEM_PHYS
19aba80048SShengzhou Liu 	SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
20aba80048SShengzhou Liu #endif
21aba80048SShengzhou Liu #ifdef QIXIS_BASE_PHYS
22aba80048SShengzhou Liu 	SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
23aba80048SShengzhou Liu #endif
24aba80048SShengzhou Liu #ifdef CONFIG_SYS_DCSRBAR_PHYS
25aba80048SShengzhou Liu 	SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
26aba80048SShengzhou Liu #endif
27aba80048SShengzhou Liu #ifdef CONFIG_SYS_NAND_BASE_PHYS
28aba80048SShengzhou Liu 	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
29aba80048SShengzhou Liu #endif
30aba80048SShengzhou Liu };
31aba80048SShengzhou Liu 
32aba80048SShengzhou Liu int num_law_entries = ARRAY_SIZE(law_table);
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