1*aba80048SShengzhou Liu /* 2*aba80048SShengzhou Liu * Copyright 2014 Freescale Semiconductor, Inc. 3*aba80048SShengzhou Liu * 4*aba80048SShengzhou Liu * SPDX-License-Identifier: GPL-2.0+ 5*aba80048SShengzhou Liu */ 6*aba80048SShengzhou Liu 7*aba80048SShengzhou Liu #include <common.h> 8*aba80048SShengzhou Liu #include <asm/fsl_law.h> 9*aba80048SShengzhou Liu #include <asm/mmu.h> 10*aba80048SShengzhou Liu 11*aba80048SShengzhou Liu struct law_entry law_table[] = { 12*aba80048SShengzhou Liu #ifndef CONFIG_SYS_NO_FLASH 13*aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC), 14*aba80048SShengzhou Liu #endif 15*aba80048SShengzhou Liu #ifdef CONFIG_SYS_BMAN_MEM_PHYS 16*aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN), 17*aba80048SShengzhou Liu #endif 18*aba80048SShengzhou Liu #ifdef CONFIG_SYS_QMAN_MEM_PHYS 19*aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), 20*aba80048SShengzhou Liu #endif 21*aba80048SShengzhou Liu #ifdef QIXIS_BASE_PHYS 22*aba80048SShengzhou Liu SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), 23*aba80048SShengzhou Liu #endif 24*aba80048SShengzhou Liu #ifdef CONFIG_SYS_DCSRBAR_PHYS 25*aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), 26*aba80048SShengzhou Liu #endif 27*aba80048SShengzhou Liu #ifdef CONFIG_SYS_NAND_BASE_PHYS 28*aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), 29*aba80048SShengzhou Liu #endif 30*aba80048SShengzhou Liu }; 31*aba80048SShengzhou Liu 32*aba80048SShengzhou Liu int num_law_entries = ARRAY_SIZE(law_table); 33