1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2aba80048SShengzhou Liu /* 3aba80048SShengzhou Liu * Copyright 2014 Freescale Semiconductor, Inc. 4aba80048SShengzhou Liu */ 5aba80048SShengzhou Liu 6aba80048SShengzhou Liu #include <common.h> 7aba80048SShengzhou Liu #include <asm/fsl_law.h> 8aba80048SShengzhou Liu #include <asm/mmu.h> 9aba80048SShengzhou Liu 10aba80048SShengzhou Liu struct law_entry law_table[] = { 11e856bdcfSMasahiro Yamada #ifdef CONFIG_MTD_NOR_FLASH 12aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC), 13aba80048SShengzhou Liu #endif 14aba80048SShengzhou Liu #ifdef CONFIG_SYS_BMAN_MEM_PHYS 15aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN), 16aba80048SShengzhou Liu #endif 17aba80048SShengzhou Liu #ifdef CONFIG_SYS_QMAN_MEM_PHYS 18aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), 19aba80048SShengzhou Liu #endif 20aba80048SShengzhou Liu #ifdef QIXIS_BASE_PHYS 21aba80048SShengzhou Liu SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), 22aba80048SShengzhou Liu #endif 23aba80048SShengzhou Liu #ifdef CONFIG_SYS_DCSRBAR_PHYS 24aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), 25aba80048SShengzhou Liu #endif 26aba80048SShengzhou Liu #ifdef CONFIG_SYS_NAND_BASE_PHYS 27aba80048SShengzhou Liu SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), 28aba80048SShengzhou Liu #endif 29aba80048SShengzhou Liu }; 30aba80048SShengzhou Liu 31aba80048SShengzhou Liu int num_law_entries = ARRAY_SIZE(law_table); 32