1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 * 20 */ 21 22 #include <common.h> 23 #include <ns16550.h> 24 #include <malloc.h> 25 #include <mmc.h> 26 #include <nand.h> 27 #include <i2c.h> 28 #include "../common/ngpixis.h" 29 #include <fsl_esdhc.h> 30 #include <spi_flash.h> 31 32 DECLARE_GLOBAL_DATA_PTR; 33 34 static const u32 sysclk_tbl[] = { 35 66666000, 7499900, 83332500, 8999900, 36 99999000, 11111000, 12499800, 13333200 37 }; 38 39 ulong get_effective_memsize(void) 40 { 41 return CONFIG_SYS_L2_SIZE; 42 } 43 44 void board_init_f(ulong bootflag) 45 { 46 int px_spd; 47 u32 plat_ratio, sys_clk, bus_clk; 48 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 49 50 console_init_f(); 51 52 /* Set pmuxcr to allow both i2c1 and i2c2 */ 53 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); 54 setbits_be32(&gur->pmuxcr, 55 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); 56 57 #ifdef CONFIG_SPL_SPI_BOOT 58 /* Enable the SPI */ 59 clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); 60 #endif 61 62 /* Read back the register to synchronize the write. */ 63 in_be32(&gur->pmuxcr); 64 65 /* initialize selected port with appropriate baud rate */ 66 px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); 67 sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; 68 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; 69 bus_clk = sys_clk * plat_ratio / 2; 70 71 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, 72 bus_clk / 16 / CONFIG_BAUDRATE); 73 #ifdef CONFIG_SPL_MMC_BOOT 74 puts("\nSD boot...\n"); 75 #elif defined(CONFIG_SPL_SPI_BOOT) 76 puts("\nSPI Flash boot...\n"); 77 #endif 78 79 /* copy code to RAM and jump to it - this should not return */ 80 /* NOTE - code has to be copied out of NAND buffer before 81 * other blocks can be read. 82 */ 83 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); 84 } 85 86 void board_init_r(gd_t *gd, ulong dest_addr) 87 { 88 /* Pointer is writable since we allocated a register for it */ 89 gd = (gd_t *)CONFIG_SPL_GD_ADDR; 90 bd_t *bd; 91 92 memset(gd, 0, sizeof(gd_t)); 93 bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); 94 memset(bd, 0, sizeof(bd_t)); 95 gd->bd = bd; 96 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; 97 bd->bi_memsize = CONFIG_SYS_L2_SIZE; 98 99 probecpu(); 100 get_clocks(); 101 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, 102 CONFIG_SPL_RELOC_MALLOC_SIZE); 103 #ifndef CONFIG_SPL_NAND_BOOT 104 env_init(); 105 #endif 106 #ifdef CONFIG_SPL_MMC_BOOT 107 mmc_initialize(bd); 108 #endif 109 /* relocate environment function pointers etc. */ 110 #ifdef CONFIG_SPL_NAND_BOOT 111 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, 112 (uchar *)CONFIG_ENV_ADDR); 113 114 gd->env_addr = (ulong)(CONFIG_ENV_ADDR); 115 gd->env_valid = 1; 116 #else 117 env_relocate(); 118 #endif 119 120 i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 121 122 gd->ram_size = initdram(0); 123 #ifdef CONFIG_SPL_NAND_BOOT 124 puts("Tertiary program loader running in sram..."); 125 #else 126 puts("Second program loader running in sram...\n"); 127 #endif 128 129 #ifdef CONFIG_SPL_MMC_BOOT 130 mmc_boot(); 131 #elif defined(CONFIG_SPL_SPI_BOOT) 132 spi_boot(); 133 #elif defined(CONFIG_SPL_NAND_BOOT) 134 nand_boot(); 135 #endif 136 } 137