1419adbfbSFabio Estevam /* 2419adbfbSFabio Estevam * (C) Copyright 2011 Freescale Semiconductor, Inc. 3419adbfbSFabio Estevam * 4419adbfbSFabio Estevam * Author: Fabio Estevam <fabio.estevam@freescale.com> 5419adbfbSFabio Estevam * 6419adbfbSFabio Estevam * See file CREDITS for list of people who contributed to this 7419adbfbSFabio Estevam * project. 8419adbfbSFabio Estevam * 9419adbfbSFabio Estevam * This program is free software; you can redistribute it and/or 10419adbfbSFabio Estevam * modify it under the terms of the GNU General Public License as 11419adbfbSFabio Estevam * published by the Free Software Foundation; either version 2 of 12419adbfbSFabio Estevam * the License, or (at your option) any later version. 13419adbfbSFabio Estevam * 14419adbfbSFabio Estevam * This program is distributed in the hope that it will be useful, 15419adbfbSFabio Estevam * but WITHOUT ANY WARRANTY; without even the implied warranty of 16419adbfbSFabio Estevam * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17419adbfbSFabio Estevam * GNU General Public License for more details. 18419adbfbSFabio Estevam */ 19419adbfbSFabio Estevam 20419adbfbSFabio Estevam #include <common.h> 21419adbfbSFabio Estevam #include <asm/io.h> 22af2a4093SFabio Estevam #include <asm/gpio.h> 23419adbfbSFabio Estevam #include <asm/arch/imx-regs.h> 24d6208a3cSBenoît Thébaudeau #include <asm/arch/iomux-mx25.h> 25af2a4093SFabio Estevam #include <asm/arch/clock.h> 26af2a4093SFabio Estevam #include <mmc.h> 27af2a4093SFabio Estevam #include <fsl_esdhc.h> 28e00c89dfSFabio Estevam #include <i2c.h> 29cabe240bSFabio Estevam #include <power/pmic.h> 30e00c89dfSFabio Estevam #include <fsl_pmic.h> 31e00c89dfSFabio Estevam #include <mc34704.h> 32af2a4093SFabio Estevam 33*1b1c5267SBenoît Thébaudeau #define FEC_RESET_B IMX_GPIO_NR(4, 8) 34*1b1c5267SBenoît Thébaudeau #define FEC_ENABLE_B IMX_GPIO_NR(2, 3) 35af2a4093SFabio Estevam #define CARD_DETECT IMX_GPIO_NR(2, 1) 36419adbfbSFabio Estevam 37419adbfbSFabio Estevam DECLARE_GLOBAL_DATA_PTR; 38419adbfbSFabio Estevam 39af2a4093SFabio Estevam #ifdef CONFIG_FSL_ESDHC 40af2a4093SFabio Estevam struct fsl_esdhc_cfg esdhc_cfg[1] = { 41af2a4093SFabio Estevam {IMX_MMC_SDHC1_BASE}, 42af2a4093SFabio Estevam }; 43af2a4093SFabio Estevam #endif 44af2a4093SFabio Estevam 45d6208a3cSBenoît Thébaudeau /* 46d6208a3cSBenoît Thébaudeau * FIXME: need to revisit this 47d6208a3cSBenoît Thébaudeau * The original code enabled PUE and 100-k pull-down without PKE, so the right 48d6208a3cSBenoît Thébaudeau * value here is likely: 49d6208a3cSBenoît Thébaudeau * 0 for no pull 50d6208a3cSBenoît Thébaudeau * or: 51d6208a3cSBenoît Thébaudeau * PAD_CTL_PUS_100K_DOWN for 100-k pull-down 52d6208a3cSBenoît Thébaudeau */ 53d6208a3cSBenoît Thébaudeau #define FEC_OUT_PAD_CTRL 0 54d6208a3cSBenoît Thébaudeau 55d6208a3cSBenoît Thébaudeau #define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \ 56d6208a3cSBenoît Thébaudeau PAD_CTL_ODE) 57d6208a3cSBenoît Thébaudeau 58e00c89dfSFabio Estevam static void mx25pdk_fec_init(void) 59e00c89dfSFabio Estevam { 60d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t fec_pads[] = { 61d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, 62d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_RX_DV__FEC_RX_DV, 63d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_RDATA0__FEC_RDATA0, 64d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL), 65d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL), 66d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL), 67d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_MDIO__FEC_MDIO, 68d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_RDATA1__FEC_RDATA1, 69d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL), 70e00c89dfSFabio Estevam 71d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_D12__GPIO_4_8, 0), /* FEC_RESET_B */ 72d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_A17__GPIO_2_3, 0), /* FEC_ENABLE_B */ 73d6208a3cSBenoît Thébaudeau }; 74e00c89dfSFabio Estevam 75d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t i2c_pads[] = { 76d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_I2C1_CLK__I2C1_CLK, I2C_PAD_CTRL), 77d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_I2C1_DAT__I2C1_DAT, I2C_PAD_CTRL), 78d6208a3cSBenoît Thébaudeau }; 79e00c89dfSFabio Estevam 80d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); 81e00c89dfSFabio Estevam 82e00c89dfSFabio Estevam /* Assert RESET and ENABLE low */ 83e00c89dfSFabio Estevam gpio_direction_output(FEC_RESET_B, 0); 84e00c89dfSFabio Estevam gpio_direction_output(FEC_ENABLE_B, 0); 85e00c89dfSFabio Estevam 86e00c89dfSFabio Estevam udelay(10); 87e00c89dfSFabio Estevam 88e00c89dfSFabio Estevam /* Deassert RESET and ENABLE */ 89e00c89dfSFabio Estevam gpio_set_value(FEC_RESET_B, 1); 90e00c89dfSFabio Estevam gpio_set_value(FEC_ENABLE_B, 1); 91e00c89dfSFabio Estevam 92e00c89dfSFabio Estevam /* Setup I2C pins so that PMIC can turn on PHY supply */ 93d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads)); 94e00c89dfSFabio Estevam } 95e00c89dfSFabio Estevam 96419adbfbSFabio Estevam int dram_init(void) 97419adbfbSFabio Estevam { 98419adbfbSFabio Estevam /* dram_init must store complete ramsize in gd->ram_size */ 99419adbfbSFabio Estevam gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 100419adbfbSFabio Estevam PHYS_SDRAM_1_SIZE); 101419adbfbSFabio Estevam return 0; 102419adbfbSFabio Estevam } 103419adbfbSFabio Estevam 104d6208a3cSBenoît Thébaudeau /* 105d6208a3cSBenoît Thébaudeau * Set up input pins with hysteresis and 100-k pull-ups 106d6208a3cSBenoît Thébaudeau */ 107d6208a3cSBenoît Thébaudeau #define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP) 108d6208a3cSBenoît Thébaudeau /* 109d6208a3cSBenoît Thébaudeau * FIXME: need to revisit this 110d6208a3cSBenoît Thébaudeau * The original code enabled PUE and 100-k pull-down without PKE, so the right 111d6208a3cSBenoît Thébaudeau * value here is likely: 112d6208a3cSBenoît Thébaudeau * 0 for no pull 113d6208a3cSBenoît Thébaudeau * or: 114d6208a3cSBenoît Thébaudeau * PAD_CTL_PUS_100K_DOWN for 100-k pull-down 115d6208a3cSBenoît Thébaudeau */ 116d6208a3cSBenoît Thébaudeau #define UART1_OUT_PAD_CTRL 0 117d6208a3cSBenoît Thébaudeau 118d6208a3cSBenoît Thébaudeau static void mx25pdk_uart1_init(void) 119d6208a3cSBenoît Thébaudeau { 120d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t uart1_pads[] = { 121d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL), 122d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL), 123d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL), 124d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL), 125d6208a3cSBenoît Thébaudeau }; 126d6208a3cSBenoît Thébaudeau 127d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); 128d6208a3cSBenoît Thébaudeau } 129d6208a3cSBenoît Thébaudeau 130419adbfbSFabio Estevam int board_early_init_f(void) 131419adbfbSFabio Estevam { 132d6208a3cSBenoît Thébaudeau mx25pdk_uart1_init(); 133419adbfbSFabio Estevam 134419adbfbSFabio Estevam return 0; 135419adbfbSFabio Estevam } 136419adbfbSFabio Estevam 137419adbfbSFabio Estevam int board_init(void) 138419adbfbSFabio Estevam { 139419adbfbSFabio Estevam /* address of boot parameters */ 140419adbfbSFabio Estevam gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 141419adbfbSFabio Estevam 142419adbfbSFabio Estevam return 0; 143419adbfbSFabio Estevam } 144419adbfbSFabio Estevam 145e00c89dfSFabio Estevam int board_late_init(void) 146e00c89dfSFabio Estevam { 147e00c89dfSFabio Estevam struct pmic *p; 148cabe240bSFabio Estevam int ret; 149e00c89dfSFabio Estevam 150e00c89dfSFabio Estevam mx25pdk_fec_init(); 151e00c89dfSFabio Estevam 152cabe240bSFabio Estevam ret = pmic_init(I2C_PMIC); 153cabe240bSFabio Estevam if (ret) 154cabe240bSFabio Estevam return ret; 155cabe240bSFabio Estevam 156cabe240bSFabio Estevam p = pmic_get("FSL_PMIC"); 157cabe240bSFabio Estevam if (!p) 158cabe240bSFabio Estevam return -ENODEV; 159cabe240bSFabio Estevam 160e00c89dfSFabio Estevam /* Turn on Ethernet PHY supply */ 161e00c89dfSFabio Estevam pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE); 162e00c89dfSFabio Estevam 163e00c89dfSFabio Estevam return 0; 164e00c89dfSFabio Estevam } 165e00c89dfSFabio Estevam 166af2a4093SFabio Estevam #ifdef CONFIG_FSL_ESDHC 167af2a4093SFabio Estevam int board_mmc_getcd(struct mmc *mmc) 168af2a4093SFabio Estevam { 169d6208a3cSBenoît Thébaudeau /* Set up the Card Detect pin. */ 170d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_A15__GPIO_2_1, 0)); 171af2a4093SFabio Estevam 172af2a4093SFabio Estevam gpio_direction_input(CARD_DETECT); 173af2a4093SFabio Estevam return !gpio_get_value(CARD_DETECT); 174af2a4093SFabio Estevam } 175af2a4093SFabio Estevam 176af2a4093SFabio Estevam int board_mmc_init(bd_t *bis) 177af2a4093SFabio Estevam { 178d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t sdhc1_pads[] = { 179d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL), 180d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL), 181d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL), 182d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL), 183d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL), 184d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL), 185d6208a3cSBenoît Thébaudeau }; 186af2a4093SFabio Estevam 187d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads)); 188af2a4093SFabio Estevam 189af2a4093SFabio Estevam esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK); 190af2a4093SFabio Estevam return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); 191af2a4093SFabio Estevam } 192af2a4093SFabio Estevam #endif 193af2a4093SFabio Estevam 194419adbfbSFabio Estevam int checkboard(void) 195419adbfbSFabio Estevam { 196419adbfbSFabio Estevam puts("Board: MX25PDK\n"); 197419adbfbSFabio Estevam 198419adbfbSFabio Estevam return 0; 199419adbfbSFabio Estevam } 200