1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2419adbfbSFabio Estevam /*
3419adbfbSFabio Estevam * (C) Copyright 2011 Freescale Semiconductor, Inc.
4419adbfbSFabio Estevam *
5419adbfbSFabio Estevam * Author: Fabio Estevam <fabio.estevam@freescale.com>
6419adbfbSFabio Estevam */
7419adbfbSFabio Estevam
8419adbfbSFabio Estevam #include <common.h>
9419adbfbSFabio Estevam #include <asm/io.h>
10af2a4093SFabio Estevam #include <asm/gpio.h>
11419adbfbSFabio Estevam #include <asm/arch/imx-regs.h>
12d6208a3cSBenoît Thébaudeau #include <asm/arch/iomux-mx25.h>
13af2a4093SFabio Estevam #include <asm/arch/clock.h>
14af2a4093SFabio Estevam #include <mmc.h>
15af2a4093SFabio Estevam #include <fsl_esdhc.h>
16e00c89dfSFabio Estevam #include <i2c.h>
17cabe240bSFabio Estevam #include <power/pmic.h>
18e00c89dfSFabio Estevam #include <fsl_pmic.h>
19e00c89dfSFabio Estevam #include <mc34704.h>
20af2a4093SFabio Estevam
211b1c5267SBenoît Thébaudeau #define FEC_RESET_B IMX_GPIO_NR(4, 8)
221b1c5267SBenoît Thébaudeau #define FEC_ENABLE_B IMX_GPIO_NR(2, 3)
23af2a4093SFabio Estevam #define CARD_DETECT IMX_GPIO_NR(2, 1)
24419adbfbSFabio Estevam
25419adbfbSFabio Estevam DECLARE_GLOBAL_DATA_PTR;
26419adbfbSFabio Estevam
27af2a4093SFabio Estevam #ifdef CONFIG_FSL_ESDHC
28af2a4093SFabio Estevam struct fsl_esdhc_cfg esdhc_cfg[1] = {
29af2a4093SFabio Estevam {IMX_MMC_SDHC1_BASE},
30af2a4093SFabio Estevam };
31af2a4093SFabio Estevam #endif
32af2a4093SFabio Estevam
33d6208a3cSBenoît Thébaudeau /*
34d6208a3cSBenoît Thébaudeau * FIXME: need to revisit this
35d6208a3cSBenoît Thébaudeau * The original code enabled PUE and 100-k pull-down without PKE, so the right
36d6208a3cSBenoît Thébaudeau * value here is likely:
37d6208a3cSBenoît Thébaudeau * 0 for no pull
38d6208a3cSBenoît Thébaudeau * or:
39d6208a3cSBenoît Thébaudeau * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
40d6208a3cSBenoît Thébaudeau */
41d6208a3cSBenoît Thébaudeau #define FEC_OUT_PAD_CTRL 0
42d6208a3cSBenoît Thébaudeau
43d6208a3cSBenoît Thébaudeau #define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
44d6208a3cSBenoît Thébaudeau PAD_CTL_ODE)
45d6208a3cSBenoît Thébaudeau
mx25pdk_fec_init(void)46e00c89dfSFabio Estevam static void mx25pdk_fec_init(void)
47e00c89dfSFabio Estevam {
48d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t fec_pads[] = {
49d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
50d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_RX_DV__FEC_RX_DV,
51d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_RDATA0__FEC_RDATA0,
52d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
53d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
54d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
55d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_MDIO__FEC_MDIO,
56d6208a3cSBenoît Thébaudeau MX25_PAD_FEC_RDATA1__FEC_RDATA1,
57d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
58e00c89dfSFabio Estevam
59d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_D12__GPIO_4_8, 0), /* FEC_RESET_B */
60d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_A17__GPIO_2_3, 0), /* FEC_ENABLE_B */
61d6208a3cSBenoît Thébaudeau };
62e00c89dfSFabio Estevam
63d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t i2c_pads[] = {
64d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_I2C1_CLK__I2C1_CLK, I2C_PAD_CTRL),
65d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_I2C1_DAT__I2C1_DAT, I2C_PAD_CTRL),
66d6208a3cSBenoît Thébaudeau };
67e00c89dfSFabio Estevam
68d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
69e00c89dfSFabio Estevam
70e00c89dfSFabio Estevam /* Assert RESET and ENABLE low */
71e00c89dfSFabio Estevam gpio_direction_output(FEC_RESET_B, 0);
72e00c89dfSFabio Estevam gpio_direction_output(FEC_ENABLE_B, 0);
73e00c89dfSFabio Estevam
74e00c89dfSFabio Estevam udelay(10);
75e00c89dfSFabio Estevam
76e00c89dfSFabio Estevam /* Deassert RESET and ENABLE */
77e00c89dfSFabio Estevam gpio_set_value(FEC_RESET_B, 1);
78e00c89dfSFabio Estevam gpio_set_value(FEC_ENABLE_B, 1);
79e00c89dfSFabio Estevam
80e00c89dfSFabio Estevam /* Setup I2C pins so that PMIC can turn on PHY supply */
81d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads));
82e00c89dfSFabio Estevam }
83e00c89dfSFabio Estevam
dram_init(void)84419adbfbSFabio Estevam int dram_init(void)
85419adbfbSFabio Estevam {
86419adbfbSFabio Estevam /* dram_init must store complete ramsize in gd->ram_size */
87419adbfbSFabio Estevam gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
88419adbfbSFabio Estevam PHYS_SDRAM_1_SIZE);
89419adbfbSFabio Estevam return 0;
90419adbfbSFabio Estevam }
91419adbfbSFabio Estevam
92d6208a3cSBenoît Thébaudeau /*
93d6208a3cSBenoît Thébaudeau * Set up input pins with hysteresis and 100-k pull-ups
94d6208a3cSBenoît Thébaudeau */
95d6208a3cSBenoît Thébaudeau #define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
96d6208a3cSBenoît Thébaudeau /*
97d6208a3cSBenoît Thébaudeau * FIXME: need to revisit this
98d6208a3cSBenoît Thébaudeau * The original code enabled PUE and 100-k pull-down without PKE, so the right
99d6208a3cSBenoît Thébaudeau * value here is likely:
100d6208a3cSBenoît Thébaudeau * 0 for no pull
101d6208a3cSBenoît Thébaudeau * or:
102d6208a3cSBenoît Thébaudeau * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
103d6208a3cSBenoît Thébaudeau */
104d6208a3cSBenoît Thébaudeau #define UART1_OUT_PAD_CTRL 0
105d6208a3cSBenoît Thébaudeau
mx25pdk_uart1_init(void)106d6208a3cSBenoît Thébaudeau static void mx25pdk_uart1_init(void)
107d6208a3cSBenoît Thébaudeau {
108d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t uart1_pads[] = {
109d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL),
110d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL),
111d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL),
112d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL),
113d6208a3cSBenoît Thébaudeau };
114d6208a3cSBenoît Thébaudeau
115d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
116d6208a3cSBenoît Thébaudeau }
117d6208a3cSBenoît Thébaudeau
board_early_init_f(void)118419adbfbSFabio Estevam int board_early_init_f(void)
119419adbfbSFabio Estevam {
120d6208a3cSBenoît Thébaudeau mx25pdk_uart1_init();
121419adbfbSFabio Estevam
122419adbfbSFabio Estevam return 0;
123419adbfbSFabio Estevam }
124419adbfbSFabio Estevam
board_init(void)125419adbfbSFabio Estevam int board_init(void)
126419adbfbSFabio Estevam {
127419adbfbSFabio Estevam /* address of boot parameters */
128419adbfbSFabio Estevam gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
129419adbfbSFabio Estevam
130419adbfbSFabio Estevam return 0;
131419adbfbSFabio Estevam }
132419adbfbSFabio Estevam
board_late_init(void)133e00c89dfSFabio Estevam int board_late_init(void)
134e00c89dfSFabio Estevam {
135e00c89dfSFabio Estevam struct pmic *p;
136cabe240bSFabio Estevam int ret;
137e00c89dfSFabio Estevam
138e00c89dfSFabio Estevam mx25pdk_fec_init();
139e00c89dfSFabio Estevam
140570aa2faSFabio Estevam ret = pmic_init(I2C_0);
141cabe240bSFabio Estevam if (ret)
142cabe240bSFabio Estevam return ret;
143cabe240bSFabio Estevam
144cabe240bSFabio Estevam p = pmic_get("FSL_PMIC");
145cabe240bSFabio Estevam if (!p)
146cabe240bSFabio Estevam return -ENODEV;
147cabe240bSFabio Estevam
14886a390d3SFabio Estevam /* Turn on Ethernet PHY and LCD supplies */
14986a390d3SFabio Estevam pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE | ONOFFA);
150e00c89dfSFabio Estevam
151e00c89dfSFabio Estevam return 0;
152e00c89dfSFabio Estevam }
153e00c89dfSFabio Estevam
154af2a4093SFabio Estevam #ifdef CONFIG_FSL_ESDHC
board_mmc_getcd(struct mmc * mmc)155af2a4093SFabio Estevam int board_mmc_getcd(struct mmc *mmc)
156af2a4093SFabio Estevam {
157d6208a3cSBenoît Thébaudeau /* Set up the Card Detect pin. */
158d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_A15__GPIO_2_1, 0));
159af2a4093SFabio Estevam
160af2a4093SFabio Estevam gpio_direction_input(CARD_DETECT);
161af2a4093SFabio Estevam return !gpio_get_value(CARD_DETECT);
162af2a4093SFabio Estevam }
163af2a4093SFabio Estevam
board_mmc_init(bd_t * bis)164af2a4093SFabio Estevam int board_mmc_init(bd_t *bis)
165af2a4093SFabio Estevam {
166d6208a3cSBenoît Thébaudeau static const iomux_v3_cfg_t sdhc1_pads[] = {
167d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
168d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
169d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
170d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
171d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
172d6208a3cSBenoît Thébaudeau NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
173d6208a3cSBenoît Thébaudeau };
174af2a4093SFabio Estevam
175d6208a3cSBenoît Thébaudeau imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
176af2a4093SFabio Estevam
177747778cfSBenoît Thébaudeau /*
178747778cfSBenoît Thébaudeau * Set the eSDHC1 PER clock to the maximum frequency lower than or equal
179747778cfSBenoît Thébaudeau * to 50 MHz that can be obtained, which requires to use UPLL as the
180747778cfSBenoît Thébaudeau * clock source. This actually gives 48 MHz.
181747778cfSBenoît Thébaudeau */
182747778cfSBenoît Thébaudeau imx_set_perclk(MXC_ESDHC1_CLK, true, 50000000);
183af2a4093SFabio Estevam esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
184af2a4093SFabio Estevam return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
185af2a4093SFabio Estevam }
186af2a4093SFabio Estevam #endif
187af2a4093SFabio Estevam
checkboard(void)188419adbfbSFabio Estevam int checkboard(void)
189419adbfbSFabio Estevam {
190419adbfbSFabio Estevam puts("Board: MX25PDK\n");
191419adbfbSFabio Estevam
192419adbfbSFabio Estevam return 0;
193419adbfbSFabio Estevam }
1944897d950SFabio Estevam
1954897d950SFabio Estevam /* Lowlevel init isn't used on mx25pdk, so just provide a dummy one here */
lowlevel_init(void)1964897d950SFabio Estevam void lowlevel_init(void) {}
197