xref: /openbmc/u-boot/board/freescale/mpc8569mds/bcsr.h (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2765547dcSHaiying Wang /*
34c2e3da8SKumar Gala  * Copyright (C) 2009 Freescale Semiconductor, Inc.
4765547dcSHaiying Wang  */
5765547dcSHaiying Wang 
6765547dcSHaiying Wang #ifndef __BCSR_H_
7765547dcSHaiying Wang #define __BCSR_H_
8765547dcSHaiying Wang 
9765547dcSHaiying Wang #include <common.h>
10765547dcSHaiying Wang 
11765547dcSHaiying Wang /* BCSR Bit definitions*/
12765547dcSHaiying Wang /****************************************/
13765547dcSHaiying Wang /* BCSR defines                         */
14765547dcSHaiying Wang /****************************************/
15765547dcSHaiying Wang #define BCSR6_UPC1_EN		0x80
16765547dcSHaiying Wang #define BCSR6_UPC1_POS_EN	0x40
17765547dcSHaiying Wang #define BCSR6_UPC1_ADDR_EN	0x20
18765547dcSHaiying Wang #define BCSR6_UPC1_DEV2		0x10
197f52ed5eSAnton Vorontsov #define BCSR6_SD_CARD_1BIT	0x08
207f52ed5eSAnton Vorontsov #define BCSR6_SD_CARD_4BITS	0x04
21765547dcSHaiying Wang #define BCSR6_TDM2G_EN		0x02
22765547dcSHaiying Wang #define BCSR6_UCC7_RMII_EN	0x01
23765547dcSHaiying Wang 
24765547dcSHaiying Wang #define BCSR7_UCC1_GETH_EN	0x80
25765547dcSHaiying Wang #define BCSR7_UCC1_RGMII_EN	0x40
26765547dcSHaiying Wang #define BCSR7_UCC1_RTBI_EN	0x20
27765547dcSHaiying Wang #define BCSR7_GETHRST_MRVL	0x04
28765547dcSHaiying Wang #define BCSR7_BRD_WRT_PROTECT	0x02
29765547dcSHaiying Wang 
30765547dcSHaiying Wang #define BCSR8_UCC2_GETH_EN	0x80
31765547dcSHaiying Wang #define BCSR8_UCC2_RGMII_EN	0x40
32765547dcSHaiying Wang #define BCSR8_UCC2_RTBI_EN	0x20
33765547dcSHaiying Wang #define BCSR8_UEM_MARVEL_RESET	0x02
34765547dcSHaiying Wang 
35765547dcSHaiying Wang #define BCSR9_UCC3_GETH_EN	0x80
36765547dcSHaiying Wang #define BCSR9_UCC3_RGMII_EN	0x40
37765547dcSHaiying Wang #define BCSR9_UCC3_RTBI_EN	0x20
38765547dcSHaiying Wang #define BCSR9_UCC3_RMII_EN	0x10
39765547dcSHaiying Wang #define BCSR9_UCC3_UEM_MICREL	0x01
40765547dcSHaiying Wang 
41765547dcSHaiying Wang #define BCSR10_UCC4_GETH_EN	0x80
42765547dcSHaiying Wang #define BCSR10_UCC4_RGMII_EN	0x40
43765547dcSHaiying Wang #define BCSR10_UCC4_RTBI_EN	0x20
44765547dcSHaiying Wang 
45765547dcSHaiying Wang #define BCSR11_LED0		0x40
46765547dcSHaiying Wang #define BCSR11_LED1		0x20
47765547dcSHaiying Wang #define BCSR11_LED2		0x10
48765547dcSHaiying Wang 
49765547dcSHaiying Wang #define BCSR12_UCC6_RMII_EN	0x20
50765547dcSHaiying Wang #define BCSR12_UCC8_RMII_EN	0x20
51765547dcSHaiying Wang 
52765547dcSHaiying Wang #define BCSR15_SMII6_DIS	0x08
53765547dcSHaiying Wang #define BCSR15_SMII8_DIS	0x04
5414809b6cSAnton Vorontsov #define BCSR15_QEUART_EN	0x01
55765547dcSHaiying Wang 
56765547dcSHaiying Wang #define BCSR16_UPC1_DEV2	0x02
57765547dcSHaiying Wang 
583fca8037SAnton Vorontsov #define BCSR17_nUSBEN		0x80
593fca8037SAnton Vorontsov #define BCSR17_nUSBLOWSPD	0x40
603fca8037SAnton Vorontsov #define BCSR17_USBVCC		0x20
613fca8037SAnton Vorontsov #define BCSR17_USBMODE		0x10
62765547dcSHaiying Wang #define BCSR17_FLASH_nWP	0x01
63765547dcSHaiying Wang 
64765547dcSHaiying Wang /*BCSR Utils functions*/
65765547dcSHaiying Wang 
66765547dcSHaiying Wang void enable_8569mds_flash_write(void);
67765547dcSHaiying Wang void disable_8569mds_flash_write(void);
68f82107f6SHaiying Wang void enable_8569mds_qe_uec(void);
69765547dcSHaiying Wang void disable_8569mds_brd_eeprom_write_protect(void);
70765547dcSHaiying Wang 
71765547dcSHaiying Wang #endif	/* __BCSR_H_ */
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