xref: /openbmc/u-boot/board/freescale/m54455evb/sbf_dram_init.S (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini/* SPDX-License-Identifier: GPL-2.0+ */
2c74dda8bSAngelo Dureghello/*
3c74dda8bSAngelo Dureghello * Board-specific sbf ddr/sdram init.
4c74dda8bSAngelo Dureghello *
5c74dda8bSAngelo Dureghello * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
6c74dda8bSAngelo Dureghello */
7c74dda8bSAngelo Dureghello
8c74dda8bSAngelo Dureghello #include <config.h>
9c74dda8bSAngelo Dureghello
10c74dda8bSAngelo Dureghello.global sbf_dram_init
11c74dda8bSAngelo Dureghello.text
12c74dda8bSAngelo Dureghello
13c74dda8bSAngelo Dureghellosbf_dram_init:
14c74dda8bSAngelo Dureghello	/* Dram Initialization a1, a2, and d0 */
15c74dda8bSAngelo Dureghello	/* mscr sdram */
16c74dda8bSAngelo Dureghello	move.l	#0xFC0A4074, %a1
17c74dda8bSAngelo Dureghello	move.b	#(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
18c74dda8bSAngelo Dureghello	nop
19c74dda8bSAngelo Dureghello
20c74dda8bSAngelo Dureghello	/* SDRAM Chip 0 and 1 */
21c74dda8bSAngelo Dureghello	move.l	#0xFC0B8110, %a1
22c74dda8bSAngelo Dureghello	move.l	#0xFC0B8114, %a2
23c74dda8bSAngelo Dureghello
24c74dda8bSAngelo Dureghello	/* calculate the size */
25c74dda8bSAngelo Dureghello	move.l	#0x13, %d1
26c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_SIZE), %d2
27c74dda8bSAngelo Dureghello#ifdef CONFIG_SYS_SDRAM_BASE1
28c74dda8bSAngelo Dureghello	lsr.l	#1, %d2
29c74dda8bSAngelo Dureghello#endif
30c74dda8bSAngelo Dureghello
31c74dda8bSAngelo Dureghellodramsz_loop:
32c74dda8bSAngelo Dureghello	lsr.l	#1, %d2
33c74dda8bSAngelo Dureghello	add.l	#1, %d1
34c74dda8bSAngelo Dureghello	cmp.l	#1, %d2
35c74dda8bSAngelo Dureghello	bne	dramsz_loop
36c74dda8bSAngelo Dureghello#ifdef CONFIG_SYS_NAND_BOOT
37c74dda8bSAngelo Dureghello	beq	asm_nand_chk_status
38c74dda8bSAngelo Dureghello#endif
39c74dda8bSAngelo Dureghello	/* SDRAM Chip 0 and 1 */
40c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_BASE), (%a1)
41c74dda8bSAngelo Dureghello	or.l	%d1, (%a1)
42c74dda8bSAngelo Dureghello#ifdef CONFIG_SYS_SDRAM_BASE1
43c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_BASE1), (%a2)
44c74dda8bSAngelo Dureghello	or.l	%d1, (%a2)
45c74dda8bSAngelo Dureghello#endif
46c74dda8bSAngelo Dureghello	nop
47c74dda8bSAngelo Dureghello
48c74dda8bSAngelo Dureghello	/* dram cfg1 and cfg2 */
49c74dda8bSAngelo Dureghello	move.l	#0xFC0B8008, %a1
50c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_CFG1), (%a1)
51c74dda8bSAngelo Dureghello	nop
52c74dda8bSAngelo Dureghello	move.l	#0xFC0B800C, %a2
53c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_CFG2), (%a2)
54c74dda8bSAngelo Dureghello	nop
55c74dda8bSAngelo Dureghello
56c74dda8bSAngelo Dureghello	move.l	#0xFC0B8000, %a1	/* Mode */
57c74dda8bSAngelo Dureghello	move.l	#0xFC0B8004, %a2	/* Ctrl */
58c74dda8bSAngelo Dureghello
59c74dda8bSAngelo Dureghello	/* Issue PALL */
60c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
61c74dda8bSAngelo Dureghello	nop
62c74dda8bSAngelo Dureghello
63c74dda8bSAngelo Dureghello	/* Issue LEMR */
64c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
65c74dda8bSAngelo Dureghello	nop
66c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
67c74dda8bSAngelo Dureghello	nop
68c74dda8bSAngelo Dureghello
69c74dda8bSAngelo Dureghello	move.l	#1000, %d1
70c74dda8bSAngelo Dureghello	bsr	asm_delay
71c74dda8bSAngelo Dureghello
72c74dda8bSAngelo Dureghello	/* Issue PALL */
73c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
74c74dda8bSAngelo Dureghello	nop
75c74dda8bSAngelo Dureghello
76c74dda8bSAngelo Dureghello	/* Perform two refresh cycles */
77c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_CTRL + 4), %d0
78c74dda8bSAngelo Dureghello	nop
79c74dda8bSAngelo Dureghello	move.l	%d0, (%a2)
80c74dda8bSAngelo Dureghello	move.l	%d0, (%a2)
81c74dda8bSAngelo Dureghello	nop
82c74dda8bSAngelo Dureghello
83c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
84c74dda8bSAngelo Dureghello	nop
85c74dda8bSAngelo Dureghello
86c74dda8bSAngelo Dureghello	move.l	#500, %d1
87c74dda8bSAngelo Dureghello	bsr	asm_delay
88c74dda8bSAngelo Dureghello
89c74dda8bSAngelo Dureghello	move.l	#(CONFIG_SYS_SDRAM_CTRL), %d1
90c74dda8bSAngelo Dureghello	and.l	#0x7FFFFFFF, %d1
91c74dda8bSAngelo Dureghello
92c74dda8bSAngelo Dureghello	or.l	#0x10000C00, %d1
93c74dda8bSAngelo Dureghello
94c74dda8bSAngelo Dureghello	move.l	%d1, (%a2)
95c74dda8bSAngelo Dureghello	nop
96c74dda8bSAngelo Dureghello
97c74dda8bSAngelo Dureghello	move.l	#2000, %d1
98c74dda8bSAngelo Dureghello	bsr	asm_delay
99c74dda8bSAngelo Dureghello
100c74dda8bSAngelo Dureghello	rts
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