1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
220c700f8SFeng Li /*
320c700f8SFeng Li * Copyright 2016 Freescale Semiconductor, Inc.
420c700f8SFeng Li *
520c700f8SFeng Li * FSL DCU Framebuffer driver
620c700f8SFeng Li */
720c700f8SFeng Li
820c700f8SFeng Li #include <common.h>
920c700f8SFeng Li #include <fsl_dcu_fb.h>
1020c700f8SFeng Li #include "div64.h"
1120c700f8SFeng Li #include "../common/dcu_sii9022a.h"
1220c700f8SFeng Li
1320c700f8SFeng Li DECLARE_GLOBAL_DATA_PTR;
1420c700f8SFeng Li
dcu_set_pixel_clock(unsigned int pixclock)1520c700f8SFeng Li unsigned int dcu_set_pixel_clock(unsigned int pixclock)
1620c700f8SFeng Li {
1720c700f8SFeng Li unsigned long long div;
1820c700f8SFeng Li
1920c700f8SFeng Li div = (unsigned long long)(gd->bus_clk / 1000);
2020c700f8SFeng Li div *= (unsigned long long)pixclock;
2120c700f8SFeng Li do_div(div, 1000000000);
2220c700f8SFeng Li
2320c700f8SFeng Li return div;
2420c700f8SFeng Li }
2520c700f8SFeng Li
platform_dcu_init(unsigned int xres,unsigned int yres,const char * port,struct fb_videomode * dcu_fb_videomode)2620c700f8SFeng Li int platform_dcu_init(unsigned int xres, unsigned int yres,
2720c700f8SFeng Li const char *port,
2820c700f8SFeng Li struct fb_videomode *dcu_fb_videomode)
2920c700f8SFeng Li {
3020c700f8SFeng Li const char *name;
3120c700f8SFeng Li unsigned int pixel_format;
3220c700f8SFeng Li
3320c700f8SFeng Li if (strncmp(port, "twr_lcd", 4) == 0) {
3420c700f8SFeng Li name = "TWR_LCD_RGB card";
3520c700f8SFeng Li } else {
3620c700f8SFeng Li name = "HDMI";
3720c700f8SFeng Li dcu_set_dvi_encoder(dcu_fb_videomode);
3820c700f8SFeng Li }
3920c700f8SFeng Li
4020c700f8SFeng Li printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
4120c700f8SFeng Li
4220c700f8SFeng Li pixel_format = 32;
4320c700f8SFeng Li fsl_dcu_init(xres, yres, pixel_format);
4420c700f8SFeng Li
4520c700f8SFeng Li return 0;
4620c700f8SFeng Li }
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