1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 23ad2737eSYing Zhang /* 33ad2737eSYing Zhang * Copyright 2014 Freescale Semiconductor, Inc. 43ad2737eSYing Zhang */ 53ad2737eSYing Zhang 63ad2737eSYing Zhang #ifndef __VID_H_ 73ad2737eSYing Zhang #define __VID_H_ 83ad2737eSYing Zhang 93ad2737eSYing Zhang #define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A 103ad2737eSYing Zhang #define IR36021_LOOP1_VOUT_OFFSET 0x9A 113ad2737eSYing Zhang #define IR36021_MFR_ID_OFFSET 0x92 123ad2737eSYing Zhang #define IR36021_MFR_ID 0x43 13cabe4d2fSYing Zhang #define IR36021_INTEL_MODE_OOFSET 0x14 14cabe4d2fSYing Zhang #define IR36021_MODE_MASK 0x20 15cabe4d2fSYing Zhang #define IR36021_INTEL_MODE 0x00 16cabe4d2fSYing Zhang #define IR36021_AMD_MODE 0x20 173ad2737eSYing Zhang 183ad2737eSYing Zhang /* step the IR regulator in 5mV increments */ 193ad2737eSYing Zhang #define IR_VDD_STEP_DOWN 5 203ad2737eSYing Zhang #define IR_VDD_STEP_UP 5 213ad2737eSYing Zhang int adjust_vdd(ulong vdd_override); 223ad2737eSYing Zhang 233ad2737eSYing Zhang #endif /* __VID_H_ */ 24