189b765c7SSudhakar Rajashekhara /* 289b765c7SSudhakar Rajashekhara * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 389b765c7SSudhakar Rajashekhara * 489b765c7SSudhakar Rajashekhara * Based on da830evm.c. Original Copyrights follow: 589b765c7SSudhakar Rajashekhara * 689b765c7SSudhakar Rajashekhara * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 789b765c7SSudhakar Rajashekhara * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 889b765c7SSudhakar Rajashekhara * 989b765c7SSudhakar Rajashekhara * This program is free software; you can redistribute it and/or modify 1089b765c7SSudhakar Rajashekhara * it under the terms of the GNU General Public License as published by 1189b765c7SSudhakar Rajashekhara * the Free Software Foundation; either version 2 of the License, or 1289b765c7SSudhakar Rajashekhara * (at your option) any later version. 1389b765c7SSudhakar Rajashekhara * 1489b765c7SSudhakar Rajashekhara * This program is distributed in the hope that it will be useful, 1589b765c7SSudhakar Rajashekhara * but WITHOUT ANY WARRANTY; without even the implied warranty of 1689b765c7SSudhakar Rajashekhara * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1789b765c7SSudhakar Rajashekhara * GNU General Public License for more details. 1889b765c7SSudhakar Rajashekhara * 1989b765c7SSudhakar Rajashekhara * You should have received a copy of the GNU General Public License 2089b765c7SSudhakar Rajashekhara * along with this program; if not, write to the Free Software 2189b765c7SSudhakar Rajashekhara * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 2289b765c7SSudhakar Rajashekhara */ 2389b765c7SSudhakar Rajashekhara 2489b765c7SSudhakar Rajashekhara #include <common.h> 2589b765c7SSudhakar Rajashekhara #include <i2c.h> 263d248d37SBen Gardiner #include <net.h> 273d248d37SBen Gardiner #include <netdev.h> 2889b765c7SSudhakar Rajashekhara #include <asm/arch/hardware.h> 29a3f88293SBen Gardiner #include <asm/arch/emif_defs.h> 303d248d37SBen Gardiner #include <asm/arch/emac_defs.h> 3189b765c7SSudhakar Rajashekhara #include <asm/io.h> 3289b765c7SSudhakar Rajashekhara #include "../common/misc.h" 3389b765c7SSudhakar Rajashekhara #include "common.h" 3489b765c7SSudhakar Rajashekhara 3589b765c7SSudhakar Rajashekhara DECLARE_GLOBAL_DATA_PTR; 3689b765c7SSudhakar Rajashekhara 3737adbf9bSPrakash PM #define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) 3889b765c7SSudhakar Rajashekhara 3989b765c7SSudhakar Rajashekhara /* SPI0 pin muxer settings */ 4089b765c7SSudhakar Rajashekhara static const struct pinmux_config spi1_pins[] = { 4137adbf9bSPrakash PM { pinmux(5), 1, 1 }, 4237adbf9bSPrakash PM { pinmux(5), 1, 2 }, 4337adbf9bSPrakash PM { pinmux(5), 1, 4 }, 4437adbf9bSPrakash PM { pinmux(5), 1, 5 } 4589b765c7SSudhakar Rajashekhara }; 4689b765c7SSudhakar Rajashekhara 4789b765c7SSudhakar Rajashekhara /* UART pin muxer settings */ 4889b765c7SSudhakar Rajashekhara static const struct pinmux_config uart_pins[] = { 4937adbf9bSPrakash PM { pinmux(0), 4, 6 }, 5037adbf9bSPrakash PM { pinmux(0), 4, 7 }, 5137adbf9bSPrakash PM { pinmux(4), 2, 4 }, 5237adbf9bSPrakash PM { pinmux(4), 2, 5 } 5389b765c7SSudhakar Rajashekhara }; 5489b765c7SSudhakar Rajashekhara 553d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC 563d248d37SBen Gardiner static const struct pinmux_config emac_pins[] = { 573d248d37SBen Gardiner { pinmux(2), 8, 1 }, 583d248d37SBen Gardiner { pinmux(2), 8, 2 }, 593d248d37SBen Gardiner { pinmux(2), 8, 3 }, 603d248d37SBen Gardiner { pinmux(2), 8, 4 }, 613d248d37SBen Gardiner { pinmux(2), 8, 5 }, 623d248d37SBen Gardiner { pinmux(2), 8, 6 }, 633d248d37SBen Gardiner { pinmux(2), 8, 7 }, 643d248d37SBen Gardiner { pinmux(3), 8, 0 }, 653d248d37SBen Gardiner { pinmux(3), 8, 1 }, 663d248d37SBen Gardiner { pinmux(3), 8, 2 }, 673d248d37SBen Gardiner { pinmux(3), 8, 3 }, 683d248d37SBen Gardiner { pinmux(3), 8, 4 }, 693d248d37SBen Gardiner { pinmux(3), 8, 5 }, 703d248d37SBen Gardiner { pinmux(3), 8, 6 }, 713d248d37SBen Gardiner { pinmux(3), 8, 7 }, 723d248d37SBen Gardiner { pinmux(4), 8, 0 }, 733d248d37SBen Gardiner { pinmux(4), 8, 1 } 743d248d37SBen Gardiner }; 753d248d37SBen Gardiner #endif /* CONFIG_DRIVER_TI_EMAC */ 763d248d37SBen Gardiner 7789b765c7SSudhakar Rajashekhara /* I2C pin muxer settings */ 7889b765c7SSudhakar Rajashekhara static const struct pinmux_config i2c_pins[] = { 7937adbf9bSPrakash PM { pinmux(4), 2, 2 }, 8037adbf9bSPrakash PM { pinmux(4), 2, 3 } 8189b765c7SSudhakar Rajashekhara }; 8289b765c7SSudhakar Rajashekhara 83756d1fe7SBen Gardiner #ifdef CONFIG_NAND_DAVINCI 84756d1fe7SBen Gardiner const struct pinmux_config nand_pins[] = { 85756d1fe7SBen Gardiner { pinmux(7), 1, 1 }, 86756d1fe7SBen Gardiner { pinmux(7), 1, 2 }, 87756d1fe7SBen Gardiner { pinmux(7), 1, 4 }, 88756d1fe7SBen Gardiner { pinmux(7), 1, 5 }, 89756d1fe7SBen Gardiner { pinmux(9), 1, 0 }, 90756d1fe7SBen Gardiner { pinmux(9), 1, 1 }, 91756d1fe7SBen Gardiner { pinmux(9), 1, 2 }, 92756d1fe7SBen Gardiner { pinmux(9), 1, 3 }, 93756d1fe7SBen Gardiner { pinmux(9), 1, 4 }, 94756d1fe7SBen Gardiner { pinmux(9), 1, 5 }, 95756d1fe7SBen Gardiner { pinmux(9), 1, 6 }, 96756d1fe7SBen Gardiner { pinmux(9), 1, 7 }, 97756d1fe7SBen Gardiner { pinmux(12), 1, 5 }, 98756d1fe7SBen Gardiner { pinmux(12), 1, 6 } 99756d1fe7SBen Gardiner }; 100756d1fe7SBen Gardiner #endif 101756d1fe7SBen Gardiner 10289b765c7SSudhakar Rajashekhara static const struct pinmux_resource pinmuxes[] = { 10389b765c7SSudhakar Rajashekhara #ifdef CONFIG_SPI_FLASH 10489b765c7SSudhakar Rajashekhara PINMUX_ITEM(spi1_pins), 10589b765c7SSudhakar Rajashekhara #endif 10689b765c7SSudhakar Rajashekhara PINMUX_ITEM(uart_pins), 10789b765c7SSudhakar Rajashekhara PINMUX_ITEM(i2c_pins), 108756d1fe7SBen Gardiner #ifdef CONFIG_NAND_DAVINCI 109756d1fe7SBen Gardiner PINMUX_ITEM(nand_pins), 110756d1fe7SBen Gardiner #endif 11189b765c7SSudhakar Rajashekhara }; 11289b765c7SSudhakar Rajashekhara 11389b765c7SSudhakar Rajashekhara static const struct lpsc_resource lpsc[] = { 11489b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 11589b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ 11689b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_EMAC }, /* image download */ 11789b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_UART2 }, /* console */ 11889b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_GPIO }, 11989b765c7SSudhakar Rajashekhara }; 12089b765c7SSudhakar Rajashekhara 121*4f6fc15bSSekhar Nori #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK 122*4f6fc15bSSekhar Nori #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 123*4f6fc15bSSekhar Nori #endif 124*4f6fc15bSSekhar Nori 125*4f6fc15bSSekhar Nori /* 126*4f6fc15bSSekhar Nori * get_board_rev() - setup to pass kernel board revision information 127*4f6fc15bSSekhar Nori * Returns: 128*4f6fc15bSSekhar Nori * bit[0-3] Maximum cpu clock rate supported by onboard SoC 129*4f6fc15bSSekhar Nori * 0000b - 300 MHz 130*4f6fc15bSSekhar Nori * 0001b - 372 MHz 131*4f6fc15bSSekhar Nori * 0010b - 408 MHz 132*4f6fc15bSSekhar Nori * 0011b - 456 MHz 133*4f6fc15bSSekhar Nori */ 134*4f6fc15bSSekhar Nori u32 get_board_rev(void) 135*4f6fc15bSSekhar Nori { 136*4f6fc15bSSekhar Nori char *s; 137*4f6fc15bSSekhar Nori u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; 138*4f6fc15bSSekhar Nori u32 rev = 0; 139*4f6fc15bSSekhar Nori 140*4f6fc15bSSekhar Nori s = getenv("maxcpuclk"); 141*4f6fc15bSSekhar Nori if (s) 142*4f6fc15bSSekhar Nori maxcpuclk = simple_strtoul(s, NULL, 10); 143*4f6fc15bSSekhar Nori 144*4f6fc15bSSekhar Nori if (maxcpuclk >= 456000000) 145*4f6fc15bSSekhar Nori rev = 3; 146*4f6fc15bSSekhar Nori else if (maxcpuclk >= 408000000) 147*4f6fc15bSSekhar Nori rev = 2; 148*4f6fc15bSSekhar Nori else if (maxcpuclk >= 372000000) 149*4f6fc15bSSekhar Nori rev = 1; 150*4f6fc15bSSekhar Nori 151*4f6fc15bSSekhar Nori return rev; 152*4f6fc15bSSekhar Nori } 153*4f6fc15bSSekhar Nori 15489b765c7SSudhakar Rajashekhara int board_init(void) 15589b765c7SSudhakar Rajashekhara { 15689b765c7SSudhakar Rajashekhara #ifndef CONFIG_USE_IRQ 15789b765c7SSudhakar Rajashekhara irq_init(); 15889b765c7SSudhakar Rajashekhara #endif 15989b765c7SSudhakar Rajashekhara 160a3f88293SBen Gardiner 161a3f88293SBen Gardiner #ifdef CONFIG_NAND_DAVINCI 162a3f88293SBen Gardiner /* 163a3f88293SBen Gardiner * NAND CS setup - cycle counts based on da850evm NAND timings in the 164a3f88293SBen Gardiner * Linux kernel @ 25MHz EMIFA 165a3f88293SBen Gardiner */ 166a3f88293SBen Gardiner writel((DAVINCI_ABCR_WSETUP(0) | 167a3f88293SBen Gardiner DAVINCI_ABCR_WSTROBE(0) | 168a3f88293SBen Gardiner DAVINCI_ABCR_WHOLD(0) | 169a3f88293SBen Gardiner DAVINCI_ABCR_RSETUP(0) | 170a3f88293SBen Gardiner DAVINCI_ABCR_RSTROBE(1) | 171a3f88293SBen Gardiner DAVINCI_ABCR_RHOLD(0) | 172a3f88293SBen Gardiner DAVINCI_ABCR_TA(0) | 173a3f88293SBen Gardiner DAVINCI_ABCR_ASIZE_8BIT), 174a3f88293SBen Gardiner &davinci_emif_regs->ab2cr); /* CS3 */ 175a3f88293SBen Gardiner #endif 176a3f88293SBen Gardiner 17789b765c7SSudhakar Rajashekhara /* arch number of the board */ 17889b765c7SSudhakar Rajashekhara gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; 17989b765c7SSudhakar Rajashekhara 18089b765c7SSudhakar Rajashekhara /* address of boot parameters */ 18189b765c7SSudhakar Rajashekhara gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 18289b765c7SSudhakar Rajashekhara 18389b765c7SSudhakar Rajashekhara /* 18489b765c7SSudhakar Rajashekhara * Power on required peripherals 18589b765c7SSudhakar Rajashekhara * ARM does not have access by default to PSC0 and PSC1 18689b765c7SSudhakar Rajashekhara * assuming here that the DSP bootloader has set the IOPU 18789b765c7SSudhakar Rajashekhara * such that PSC access is available to ARM 18889b765c7SSudhakar Rajashekhara */ 18989b765c7SSudhakar Rajashekhara if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 19089b765c7SSudhakar Rajashekhara return 1; 19189b765c7SSudhakar Rajashekhara 19289b765c7SSudhakar Rajashekhara /* setup the SUSPSRC for ARM to control emulation suspend */ 19389b765c7SSudhakar Rajashekhara writel(readl(&davinci_syscfg_regs->suspsrc) & 19489b765c7SSudhakar Rajashekhara ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 19589b765c7SSudhakar Rajashekhara DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 19689b765c7SSudhakar Rajashekhara DAVINCI_SYSCFG_SUSPSRC_UART2), 19789b765c7SSudhakar Rajashekhara &davinci_syscfg_regs->suspsrc); 19889b765c7SSudhakar Rajashekhara 19989b765c7SSudhakar Rajashekhara /* configure pinmux settings */ 20089b765c7SSudhakar Rajashekhara if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 20189b765c7SSudhakar Rajashekhara return 1; 20289b765c7SSudhakar Rajashekhara 2033d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC 2043d248d37SBen Gardiner if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) 2053d248d37SBen Gardiner return 1; 2063d248d37SBen Gardiner /* set cfgchip3 to select MII */ 2073d248d37SBen Gardiner writel(readl(&davinci_syscfg_regs->cfgchip3) & ~(1 << 8), 2083d248d37SBen Gardiner &davinci_syscfg_regs->cfgchip3); 2093d248d37SBen Gardiner #endif /* CONFIG_DRIVER_TI_EMAC */ 2103d248d37SBen Gardiner 21189b765c7SSudhakar Rajashekhara /* enable the console UART */ 21289b765c7SSudhakar Rajashekhara writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 21389b765c7SSudhakar Rajashekhara DAVINCI_UART_PWREMU_MGMT_UTRST), 21489b765c7SSudhakar Rajashekhara &davinci_uart2_ctrl_regs->pwremu_mgmt); 21589b765c7SSudhakar Rajashekhara 21689b765c7SSudhakar Rajashekhara return 0; 21789b765c7SSudhakar Rajashekhara } 2183d248d37SBen Gardiner 2193d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC 2203d248d37SBen Gardiner 2213d248d37SBen Gardiner /* 2223d248d37SBen Gardiner * Initializes on-board ethernet controllers. 2233d248d37SBen Gardiner */ 2243d248d37SBen Gardiner int board_eth_init(bd_t *bis) 2253d248d37SBen Gardiner { 2263d248d37SBen Gardiner if (!davinci_emac_initialize()) { 2273d248d37SBen Gardiner printf("Error: Ethernet init failed!\n"); 2283d248d37SBen Gardiner return -1; 2293d248d37SBen Gardiner } 2303d248d37SBen Gardiner 2313d248d37SBen Gardiner return 0; 2323d248d37SBen Gardiner } 2333d248d37SBen Gardiner #endif /* CONFIG_DRIVER_TI_EMAC */ 234