189b765c7SSudhakar Rajashekhara /* 289b765c7SSudhakar Rajashekhara * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 389b765c7SSudhakar Rajashekhara * 489b765c7SSudhakar Rajashekhara * Based on da830evm.c. Original Copyrights follow: 589b765c7SSudhakar Rajashekhara * 689b765c7SSudhakar Rajashekhara * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 789b765c7SSudhakar Rajashekhara * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 889b765c7SSudhakar Rajashekhara * 989b765c7SSudhakar Rajashekhara * This program is free software; you can redistribute it and/or modify 1089b765c7SSudhakar Rajashekhara * it under the terms of the GNU General Public License as published by 1189b765c7SSudhakar Rajashekhara * the Free Software Foundation; either version 2 of the License, or 1289b765c7SSudhakar Rajashekhara * (at your option) any later version. 1389b765c7SSudhakar Rajashekhara * 1489b765c7SSudhakar Rajashekhara * This program is distributed in the hope that it will be useful, 1589b765c7SSudhakar Rajashekhara * but WITHOUT ANY WARRANTY; without even the implied warranty of 1689b765c7SSudhakar Rajashekhara * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1789b765c7SSudhakar Rajashekhara * GNU General Public License for more details. 1889b765c7SSudhakar Rajashekhara * 1989b765c7SSudhakar Rajashekhara * You should have received a copy of the GNU General Public License 2089b765c7SSudhakar Rajashekhara * along with this program; if not, write to the Free Software 2189b765c7SSudhakar Rajashekhara * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 2289b765c7SSudhakar Rajashekhara */ 2389b765c7SSudhakar Rajashekhara 2489b765c7SSudhakar Rajashekhara #include <common.h> 2589b765c7SSudhakar Rajashekhara #include <i2c.h> 263d248d37SBen Gardiner #include <net.h> 273d248d37SBen Gardiner #include <netdev.h> 2889b765c7SSudhakar Rajashekhara #include <asm/arch/hardware.h> 29a3f88293SBen Gardiner #include <asm/arch/emif_defs.h> 303d248d37SBen Gardiner #include <asm/arch/emac_defs.h> 3189b765c7SSudhakar Rajashekhara #include <asm/io.h> 32d7f9b503SSughosh Ganu #include <asm/arch/davinci_misc.h> 3389b765c7SSudhakar Rajashekhara 3489b765c7SSudhakar Rajashekhara DECLARE_GLOBAL_DATA_PTR; 3589b765c7SSudhakar Rajashekhara 3637adbf9bSPrakash PM #define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) 3789b765c7SSudhakar Rajashekhara 3889b765c7SSudhakar Rajashekhara /* SPI0 pin muxer settings */ 3989b765c7SSudhakar Rajashekhara static const struct pinmux_config spi1_pins[] = { 4037adbf9bSPrakash PM { pinmux(5), 1, 1 }, 4137adbf9bSPrakash PM { pinmux(5), 1, 2 }, 4237adbf9bSPrakash PM { pinmux(5), 1, 4 }, 4337adbf9bSPrakash PM { pinmux(5), 1, 5 } 4489b765c7SSudhakar Rajashekhara }; 4589b765c7SSudhakar Rajashekhara 4689b765c7SSudhakar Rajashekhara /* UART pin muxer settings */ 4789b765c7SSudhakar Rajashekhara static const struct pinmux_config uart_pins[] = { 4837adbf9bSPrakash PM { pinmux(0), 4, 6 }, 4937adbf9bSPrakash PM { pinmux(0), 4, 7 }, 5037adbf9bSPrakash PM { pinmux(4), 2, 4 }, 5137adbf9bSPrakash PM { pinmux(4), 2, 5 } 5289b765c7SSudhakar Rajashekhara }; 5389b765c7SSudhakar Rajashekhara 543d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC 553d248d37SBen Gardiner static const struct pinmux_config emac_pins[] = { 56d2607401SSudhakar Rajashekhara #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 57d2607401SSudhakar Rajashekhara { pinmux(14), 8, 2 }, 58d2607401SSudhakar Rajashekhara { pinmux(14), 8, 3 }, 59d2607401SSudhakar Rajashekhara { pinmux(14), 8, 4 }, 60d2607401SSudhakar Rajashekhara { pinmux(14), 8, 5 }, 61d2607401SSudhakar Rajashekhara { pinmux(14), 8, 6 }, 62d2607401SSudhakar Rajashekhara { pinmux(14), 8, 7 }, 63d2607401SSudhakar Rajashekhara { pinmux(15), 8, 1 }, 64d2607401SSudhakar Rajashekhara #else /* ! CONFIG_DRIVER_TI_EMAC_USE_RMII */ 653d248d37SBen Gardiner { pinmux(2), 8, 1 }, 663d248d37SBen Gardiner { pinmux(2), 8, 2 }, 673d248d37SBen Gardiner { pinmux(2), 8, 3 }, 683d248d37SBen Gardiner { pinmux(2), 8, 4 }, 693d248d37SBen Gardiner { pinmux(2), 8, 5 }, 703d248d37SBen Gardiner { pinmux(2), 8, 6 }, 713d248d37SBen Gardiner { pinmux(2), 8, 7 }, 723d248d37SBen Gardiner { pinmux(3), 8, 0 }, 733d248d37SBen Gardiner { pinmux(3), 8, 1 }, 743d248d37SBen Gardiner { pinmux(3), 8, 2 }, 753d248d37SBen Gardiner { pinmux(3), 8, 3 }, 763d248d37SBen Gardiner { pinmux(3), 8, 4 }, 773d248d37SBen Gardiner { pinmux(3), 8, 5 }, 783d248d37SBen Gardiner { pinmux(3), 8, 6 }, 793d248d37SBen Gardiner { pinmux(3), 8, 7 }, 80d2607401SSudhakar Rajashekhara #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ 813d248d37SBen Gardiner { pinmux(4), 8, 0 }, 823d248d37SBen Gardiner { pinmux(4), 8, 1 } 833d248d37SBen Gardiner }; 843d248d37SBen Gardiner 8589b765c7SSudhakar Rajashekhara /* I2C pin muxer settings */ 8689b765c7SSudhakar Rajashekhara static const struct pinmux_config i2c_pins[] = { 8737adbf9bSPrakash PM { pinmux(4), 2, 2 }, 8837adbf9bSPrakash PM { pinmux(4), 2, 3 } 8989b765c7SSudhakar Rajashekhara }; 9089b765c7SSudhakar Rajashekhara 91756d1fe7SBen Gardiner #ifdef CONFIG_NAND_DAVINCI 92756d1fe7SBen Gardiner const struct pinmux_config nand_pins[] = { 93756d1fe7SBen Gardiner { pinmux(7), 1, 1 }, 94756d1fe7SBen Gardiner { pinmux(7), 1, 2 }, 95756d1fe7SBen Gardiner { pinmux(7), 1, 4 }, 96756d1fe7SBen Gardiner { pinmux(7), 1, 5 }, 97756d1fe7SBen Gardiner { pinmux(9), 1, 0 }, 98756d1fe7SBen Gardiner { pinmux(9), 1, 1 }, 99756d1fe7SBen Gardiner { pinmux(9), 1, 2 }, 100756d1fe7SBen Gardiner { pinmux(9), 1, 3 }, 101756d1fe7SBen Gardiner { pinmux(9), 1, 4 }, 102756d1fe7SBen Gardiner { pinmux(9), 1, 5 }, 103756d1fe7SBen Gardiner { pinmux(9), 1, 6 }, 104756d1fe7SBen Gardiner { pinmux(9), 1, 7 }, 105756d1fe7SBen Gardiner { pinmux(12), 1, 5 }, 106756d1fe7SBen Gardiner { pinmux(12), 1, 6 } 107756d1fe7SBen Gardiner }; 108756d1fe7SBen Gardiner #endif 109756d1fe7SBen Gardiner 110d2607401SSudhakar Rajashekhara #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 111d2607401SSudhakar Rajashekhara #define HAS_RMII 1 112d2607401SSudhakar Rajashekhara #else 113d2607401SSudhakar Rajashekhara #define HAS_RMII 0 114d2607401SSudhakar Rajashekhara #endif 115d2607401SSudhakar Rajashekhara #endif /* CONFIG_DRIVER_TI_EMAC */ 116d2607401SSudhakar Rajashekhara 11789b765c7SSudhakar Rajashekhara static const struct pinmux_resource pinmuxes[] = { 11889b765c7SSudhakar Rajashekhara #ifdef CONFIG_SPI_FLASH 11989b765c7SSudhakar Rajashekhara PINMUX_ITEM(spi1_pins), 12089b765c7SSudhakar Rajashekhara #endif 12189b765c7SSudhakar Rajashekhara PINMUX_ITEM(uart_pins), 12289b765c7SSudhakar Rajashekhara PINMUX_ITEM(i2c_pins), 123756d1fe7SBen Gardiner #ifdef CONFIG_NAND_DAVINCI 124756d1fe7SBen Gardiner PINMUX_ITEM(nand_pins), 125756d1fe7SBen Gardiner #endif 12689b765c7SSudhakar Rajashekhara }; 12789b765c7SSudhakar Rajashekhara 12889b765c7SSudhakar Rajashekhara static const struct lpsc_resource lpsc[] = { 12989b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 13089b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ 13189b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_EMAC }, /* image download */ 13289b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_UART2 }, /* console */ 13389b765c7SSudhakar Rajashekhara { DAVINCI_LPSC_GPIO }, 13489b765c7SSudhakar Rajashekhara }; 13589b765c7SSudhakar Rajashekhara 1364f6fc15bSSekhar Nori #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK 1374f6fc15bSSekhar Nori #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 1384f6fc15bSSekhar Nori #endif 1394f6fc15bSSekhar Nori 1404f6fc15bSSekhar Nori /* 1414f6fc15bSSekhar Nori * get_board_rev() - setup to pass kernel board revision information 1424f6fc15bSSekhar Nori * Returns: 1434f6fc15bSSekhar Nori * bit[0-3] Maximum cpu clock rate supported by onboard SoC 1444f6fc15bSSekhar Nori * 0000b - 300 MHz 1454f6fc15bSSekhar Nori * 0001b - 372 MHz 1464f6fc15bSSekhar Nori * 0010b - 408 MHz 1474f6fc15bSSekhar Nori * 0011b - 456 MHz 1484f6fc15bSSekhar Nori */ 1494f6fc15bSSekhar Nori u32 get_board_rev(void) 1504f6fc15bSSekhar Nori { 1514f6fc15bSSekhar Nori char *s; 1524f6fc15bSSekhar Nori u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; 1534f6fc15bSSekhar Nori u32 rev = 0; 1544f6fc15bSSekhar Nori 1554f6fc15bSSekhar Nori s = getenv("maxcpuclk"); 1564f6fc15bSSekhar Nori if (s) 1574f6fc15bSSekhar Nori maxcpuclk = simple_strtoul(s, NULL, 10); 1584f6fc15bSSekhar Nori 1594f6fc15bSSekhar Nori if (maxcpuclk >= 456000000) 1604f6fc15bSSekhar Nori rev = 3; 1614f6fc15bSSekhar Nori else if (maxcpuclk >= 408000000) 1624f6fc15bSSekhar Nori rev = 2; 1634f6fc15bSSekhar Nori else if (maxcpuclk >= 372000000) 1644f6fc15bSSekhar Nori rev = 1; 1654f6fc15bSSekhar Nori 1664f6fc15bSSekhar Nori return rev; 1674f6fc15bSSekhar Nori } 1684f6fc15bSSekhar Nori 16989b765c7SSudhakar Rajashekhara int board_init(void) 17089b765c7SSudhakar Rajashekhara { 17189b765c7SSudhakar Rajashekhara #ifndef CONFIG_USE_IRQ 17289b765c7SSudhakar Rajashekhara irq_init(); 17389b765c7SSudhakar Rajashekhara #endif 17489b765c7SSudhakar Rajashekhara 175a3f88293SBen Gardiner 176a3f88293SBen Gardiner #ifdef CONFIG_NAND_DAVINCI 177a3f88293SBen Gardiner /* 178a3f88293SBen Gardiner * NAND CS setup - cycle counts based on da850evm NAND timings in the 179a3f88293SBen Gardiner * Linux kernel @ 25MHz EMIFA 180a3f88293SBen Gardiner */ 181a3f88293SBen Gardiner writel((DAVINCI_ABCR_WSETUP(0) | 182*24a514c4SBen Gardiner DAVINCI_ABCR_WSTROBE(1) | 183a3f88293SBen Gardiner DAVINCI_ABCR_WHOLD(0) | 184a3f88293SBen Gardiner DAVINCI_ABCR_RSETUP(0) | 185a3f88293SBen Gardiner DAVINCI_ABCR_RSTROBE(1) | 186a3f88293SBen Gardiner DAVINCI_ABCR_RHOLD(0) | 187*24a514c4SBen Gardiner DAVINCI_ABCR_TA(1) | 188a3f88293SBen Gardiner DAVINCI_ABCR_ASIZE_8BIT), 189a3f88293SBen Gardiner &davinci_emif_regs->ab2cr); /* CS3 */ 190a3f88293SBen Gardiner #endif 191a3f88293SBen Gardiner 19289b765c7SSudhakar Rajashekhara /* arch number of the board */ 19389b765c7SSudhakar Rajashekhara gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; 19489b765c7SSudhakar Rajashekhara 19589b765c7SSudhakar Rajashekhara /* address of boot parameters */ 19689b765c7SSudhakar Rajashekhara gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 19789b765c7SSudhakar Rajashekhara 19889b765c7SSudhakar Rajashekhara /* 19989b765c7SSudhakar Rajashekhara * Power on required peripherals 20089b765c7SSudhakar Rajashekhara * ARM does not have access by default to PSC0 and PSC1 20189b765c7SSudhakar Rajashekhara * assuming here that the DSP bootloader has set the IOPU 20289b765c7SSudhakar Rajashekhara * such that PSC access is available to ARM 20389b765c7SSudhakar Rajashekhara */ 20489b765c7SSudhakar Rajashekhara if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 20589b765c7SSudhakar Rajashekhara return 1; 20689b765c7SSudhakar Rajashekhara 20789b765c7SSudhakar Rajashekhara /* setup the SUSPSRC for ARM to control emulation suspend */ 20889b765c7SSudhakar Rajashekhara writel(readl(&davinci_syscfg_regs->suspsrc) & 20989b765c7SSudhakar Rajashekhara ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 21089b765c7SSudhakar Rajashekhara DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 21189b765c7SSudhakar Rajashekhara DAVINCI_SYSCFG_SUSPSRC_UART2), 21289b765c7SSudhakar Rajashekhara &davinci_syscfg_regs->suspsrc); 21389b765c7SSudhakar Rajashekhara 21489b765c7SSudhakar Rajashekhara /* configure pinmux settings */ 21589b765c7SSudhakar Rajashekhara if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 21689b765c7SSudhakar Rajashekhara return 1; 21789b765c7SSudhakar Rajashekhara 2183d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC 2193d248d37SBen Gardiner if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) 2203d248d37SBen Gardiner return 1; 221d2607401SSudhakar Rajashekhara 2226d1c649fSStefano Babic davinci_emac_mii_mode_sel(HAS_RMII); 2233d248d37SBen Gardiner #endif /* CONFIG_DRIVER_TI_EMAC */ 2243d248d37SBen Gardiner 22589b765c7SSudhakar Rajashekhara /* enable the console UART */ 22689b765c7SSudhakar Rajashekhara writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 22789b765c7SSudhakar Rajashekhara DAVINCI_UART_PWREMU_MGMT_UTRST), 22889b765c7SSudhakar Rajashekhara &davinci_uart2_ctrl_regs->pwremu_mgmt); 22989b765c7SSudhakar Rajashekhara 23089b765c7SSudhakar Rajashekhara return 0; 23189b765c7SSudhakar Rajashekhara } 2323d248d37SBen Gardiner 2333d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC 2343d248d37SBen Gardiner 235d2607401SSudhakar Rajashekhara #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 236d2607401SSudhakar Rajashekhara /** 237d2607401SSudhakar Rajashekhara * rmii_hw_init 238d2607401SSudhakar Rajashekhara * 239d2607401SSudhakar Rajashekhara * DA850/OMAP-L138 EVM can interface to a daughter card for 240d2607401SSudhakar Rajashekhara * additional features. This card has an I2C GPIO Expander TCA6416 241d2607401SSudhakar Rajashekhara * to select the required functions like camera, RMII Ethernet, 242d2607401SSudhakar Rajashekhara * character LCD, video. 243d2607401SSudhakar Rajashekhara * 244d2607401SSudhakar Rajashekhara * Initialization of the expander involves configuring the 245d2607401SSudhakar Rajashekhara * polarity and direction of the ports. P07-P05 are used here. 246d2607401SSudhakar Rajashekhara * These ports are connected to a Mux chip which enables only one 247d2607401SSudhakar Rajashekhara * functionality at a time. 248d2607401SSudhakar Rajashekhara * 249d2607401SSudhakar Rajashekhara * For RMII phy to respond, the MII MDIO clock has to be disabled 250d2607401SSudhakar Rajashekhara * since both the PHY devices have address as zero. The MII MDIO 251d2607401SSudhakar Rajashekhara * clock is controlled via GPIO2[6]. 252d2607401SSudhakar Rajashekhara * 253d2607401SSudhakar Rajashekhara * This code is valid for Beta version of the hardware 254d2607401SSudhakar Rajashekhara */ 255d2607401SSudhakar Rajashekhara int rmii_hw_init(void) 256d2607401SSudhakar Rajashekhara { 257d2607401SSudhakar Rajashekhara const struct pinmux_config gpio_pins[] = { 258d2607401SSudhakar Rajashekhara { pinmux(6), 8, 1 } 259d2607401SSudhakar Rajashekhara }; 260d2607401SSudhakar Rajashekhara u_int8_t buf[2]; 261d2607401SSudhakar Rajashekhara unsigned int temp; 262d2607401SSudhakar Rajashekhara int ret; 263d2607401SSudhakar Rajashekhara 264d2607401SSudhakar Rajashekhara /* PinMux for GPIO */ 265d2607401SSudhakar Rajashekhara if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) 266d2607401SSudhakar Rajashekhara return 1; 267d2607401SSudhakar Rajashekhara 268d2607401SSudhakar Rajashekhara /* I2C Exapnder configuration */ 269d2607401SSudhakar Rajashekhara /* Set polarity to non-inverted */ 270d2607401SSudhakar Rajashekhara buf[0] = 0x0; 271d2607401SSudhakar Rajashekhara buf[1] = 0x0; 272d2607401SSudhakar Rajashekhara ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2); 273d2607401SSudhakar Rajashekhara if (ret) { 274d2607401SSudhakar Rajashekhara printf("\nExpander @ 0x%02x write FAILED!!!\n", 275d2607401SSudhakar Rajashekhara CONFIG_SYS_I2C_EXPANDER_ADDR); 276d2607401SSudhakar Rajashekhara return ret; 277d2607401SSudhakar Rajashekhara } 278d2607401SSudhakar Rajashekhara 279d2607401SSudhakar Rajashekhara /* Configure P07-P05 as outputs */ 280d2607401SSudhakar Rajashekhara buf[0] = 0x1f; 281d2607401SSudhakar Rajashekhara buf[1] = 0xff; 282d2607401SSudhakar Rajashekhara ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2); 283d2607401SSudhakar Rajashekhara if (ret) { 284d2607401SSudhakar Rajashekhara printf("\nExpander @ 0x%02x write FAILED!!!\n", 285d2607401SSudhakar Rajashekhara CONFIG_SYS_I2C_EXPANDER_ADDR); 286d2607401SSudhakar Rajashekhara } 287d2607401SSudhakar Rajashekhara 288d2607401SSudhakar Rajashekhara /* For Ethernet RMII selection 289d2607401SSudhakar Rajashekhara * P07(SelA)=0 290d2607401SSudhakar Rajashekhara * P06(SelB)=1 291d2607401SSudhakar Rajashekhara * P05(SelC)=1 292d2607401SSudhakar Rajashekhara */ 293d2607401SSudhakar Rajashekhara if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { 294d2607401SSudhakar Rajashekhara printf("\nExpander @ 0x%02x read FAILED!!!\n", 295d2607401SSudhakar Rajashekhara CONFIG_SYS_I2C_EXPANDER_ADDR); 296d2607401SSudhakar Rajashekhara } 297d2607401SSudhakar Rajashekhara 298d2607401SSudhakar Rajashekhara buf[0] &= 0x1f; 299d2607401SSudhakar Rajashekhara buf[0] |= (0 << 7) | (1 << 6) | (1 << 5); 300d2607401SSudhakar Rajashekhara if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { 301d2607401SSudhakar Rajashekhara printf("\nExpander @ 0x%02x write FAILED!!!\n", 302d2607401SSudhakar Rajashekhara CONFIG_SYS_I2C_EXPANDER_ADDR); 303d2607401SSudhakar Rajashekhara } 304d2607401SSudhakar Rajashekhara 305d2607401SSudhakar Rajashekhara /* Set the output as high */ 306d2607401SSudhakar Rajashekhara temp = REG(GPIO_BANK2_REG_SET_ADDR); 307d2607401SSudhakar Rajashekhara temp |= (0x01 << 6); 308d2607401SSudhakar Rajashekhara REG(GPIO_BANK2_REG_SET_ADDR) = temp; 309d2607401SSudhakar Rajashekhara 310d2607401SSudhakar Rajashekhara /* Set the GPIO direction as output */ 311d2607401SSudhakar Rajashekhara temp = REG(GPIO_BANK2_REG_DIR_ADDR); 312d2607401SSudhakar Rajashekhara temp &= ~(0x01 << 6); 313d2607401SSudhakar Rajashekhara REG(GPIO_BANK2_REG_DIR_ADDR) = temp; 314d2607401SSudhakar Rajashekhara 315d2607401SSudhakar Rajashekhara return 0; 316d2607401SSudhakar Rajashekhara } 317d2607401SSudhakar Rajashekhara #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ 318d2607401SSudhakar Rajashekhara 3193d248d37SBen Gardiner /* 3203d248d37SBen Gardiner * Initializes on-board ethernet controllers. 3213d248d37SBen Gardiner */ 3223d248d37SBen Gardiner int board_eth_init(bd_t *bis) 3233d248d37SBen Gardiner { 324d2607401SSudhakar Rajashekhara #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 325d2607401SSudhakar Rajashekhara /* Select RMII fucntion through the expander */ 326d2607401SSudhakar Rajashekhara if (rmii_hw_init()) 327d2607401SSudhakar Rajashekhara printf("RMII hardware init failed!!!\n"); 328d2607401SSudhakar Rajashekhara #endif 3293d248d37SBen Gardiner if (!davinci_emac_initialize()) { 3303d248d37SBen Gardiner printf("Error: Ethernet init failed!\n"); 3313d248d37SBen Gardiner return -1; 3323d248d37SBen Gardiner } 3333d248d37SBen Gardiner 3343d248d37SBen Gardiner return 0; 3353d248d37SBen Gardiner } 3363d248d37SBen Gardiner #endif /* CONFIG_DRIVER_TI_EMAC */ 337