182ceba2cSStefan Roese /* 282ceba2cSStefan Roese * Copyright (C) 2016 Stefan Roese <sr@denx.de> 382ceba2cSStefan Roese * 482ceba2cSStefan Roese * SPDX-License-Identifier: GPL-2.0+ 582ceba2cSStefan Roese */ 682ceba2cSStefan Roese 782ceba2cSStefan Roese #include <common.h> 882ceba2cSStefan Roese #include <winbond_w83627.h> 982ceba2cSStefan Roese #include <asm/gpio.h> 1082ceba2cSStefan Roese #include <asm/ibmpc.h> 1182ceba2cSStefan Roese #include <asm/pnp_def.h> 1282ceba2cSStefan Roese 1382ceba2cSStefan Roese int board_early_init_f(void) 1482ceba2cSStefan Roese { 15*f2a751beSStefan Roese #ifndef CONFIG_INTERNAL_UART 1682ceba2cSStefan Roese /* 1782ceba2cSStefan Roese * The FSP enables the BayTrail internal legacy UART (again). 1882ceba2cSStefan Roese * Disable it again, so that the Winbond one can be used. 1982ceba2cSStefan Roese */ 2082ceba2cSStefan Roese setup_internal_uart(0); 2182ceba2cSStefan Roese 2282ceba2cSStefan Roese /* Enable the legacy UART in the Winbond W83627 Super IO chip */ 2382ceba2cSStefan Roese winbond_enable_serial(PNP_DEV(WINBOND_IO_PORT, W83627DHG_SP1), 2482ceba2cSStefan Roese UART0_BASE, UART0_IRQ); 25*f2a751beSStefan Roese #endif 2682ceba2cSStefan Roese 2782ceba2cSStefan Roese return 0; 2882ceba2cSStefan Roese } 2982ceba2cSStefan Roese 3082ceba2cSStefan Roese int arch_early_init_r(void) 3182ceba2cSStefan Roese { 3282ceba2cSStefan Roese return 0; 3382ceba2cSStefan Roese } 34