1*82ceba2cSStefan Roese /* 2*82ceba2cSStefan Roese * Copyright (C) 2016 Stefan Roese <sr@denx.de> 3*82ceba2cSStefan Roese * 4*82ceba2cSStefan Roese * SPDX-License-Identifier: GPL-2.0+ 5*82ceba2cSStefan Roese */ 6*82ceba2cSStefan Roese 7*82ceba2cSStefan Roese #include <common.h> 8*82ceba2cSStefan Roese #include <winbond_w83627.h> 9*82ceba2cSStefan Roese #include <asm/gpio.h> 10*82ceba2cSStefan Roese #include <asm/ibmpc.h> 11*82ceba2cSStefan Roese #include <asm/pnp_def.h> 12*82ceba2cSStefan Roese 13*82ceba2cSStefan Roese int board_early_init_f(void) 14*82ceba2cSStefan Roese { 15*82ceba2cSStefan Roese /* 16*82ceba2cSStefan Roese * The FSP enables the BayTrail internal legacy UART (again). 17*82ceba2cSStefan Roese * Disable it again, so that the Winbond one can be used. 18*82ceba2cSStefan Roese */ 19*82ceba2cSStefan Roese setup_internal_uart(0); 20*82ceba2cSStefan Roese 21*82ceba2cSStefan Roese /* Enable the legacy UART in the Winbond W83627 Super IO chip */ 22*82ceba2cSStefan Roese winbond_enable_serial(PNP_DEV(WINBOND_IO_PORT, W83627DHG_SP1), 23*82ceba2cSStefan Roese UART0_BASE, UART0_IRQ); 24*82ceba2cSStefan Roese 25*82ceba2cSStefan Roese return 0; 26*82ceba2cSStefan Roese } 27*82ceba2cSStefan Roese 28*82ceba2cSStefan Roese int arch_early_init_r(void) 29*82ceba2cSStefan Roese { 30*82ceba2cSStefan Roese return 0; 31*82ceba2cSStefan Roese } 32