182ceba2cSStefan Roese /* 282ceba2cSStefan Roese * Copyright (C) 2016 Stefan Roese <sr@denx.de> 382ceba2cSStefan Roese * 482ceba2cSStefan Roese * SPDX-License-Identifier: GPL-2.0+ 582ceba2cSStefan Roese */ 682ceba2cSStefan Roese 782ceba2cSStefan Roese #include <common.h> 8*303dfc2eSStefan Roese #include <i2c.h> 982ceba2cSStefan Roese #include <winbond_w83627.h> 1082ceba2cSStefan Roese #include <asm/gpio.h> 1182ceba2cSStefan Roese #include <asm/ibmpc.h> 1282ceba2cSStefan Roese #include <asm/pnp_def.h> 1382ceba2cSStefan Roese 1482ceba2cSStefan Roese int board_early_init_f(void) 1582ceba2cSStefan Roese { 16f2a751beSStefan Roese #ifndef CONFIG_INTERNAL_UART 1782ceba2cSStefan Roese /* 1882ceba2cSStefan Roese * The FSP enables the BayTrail internal legacy UART (again). 1982ceba2cSStefan Roese * Disable it again, so that the Winbond one can be used. 2082ceba2cSStefan Roese */ 2182ceba2cSStefan Roese setup_internal_uart(0); 2282ceba2cSStefan Roese 2382ceba2cSStefan Roese /* Enable the legacy UART in the Winbond W83627 Super IO chip */ 2482ceba2cSStefan Roese winbond_enable_serial(PNP_DEV(WINBOND_IO_PORT, W83627DHG_SP1), 2582ceba2cSStefan Roese UART0_BASE, UART0_IRQ); 26f2a751beSStefan Roese #endif 2782ceba2cSStefan Roese 2882ceba2cSStefan Roese return 0; 2982ceba2cSStefan Roese } 3082ceba2cSStefan Roese 3182ceba2cSStefan Roese int arch_early_init_r(void) 3282ceba2cSStefan Roese { 3382ceba2cSStefan Roese return 0; 3482ceba2cSStefan Roese } 35*303dfc2eSStefan Roese 36*303dfc2eSStefan Roese int board_late_init(void) 37*303dfc2eSStefan Roese { 38*303dfc2eSStefan Roese struct udevice *dev; 39*303dfc2eSStefan Roese u8 buf[8]; 40*303dfc2eSStefan Roese int ret; 41*303dfc2eSStefan Roese 42*303dfc2eSStefan Roese /* Configure SMSC USB2513 USB Hub: 7bit address 0x2c */ 43*303dfc2eSStefan Roese ret = i2c_get_chip_for_busnum(0, 0x2c, 1, &dev); 44*303dfc2eSStefan Roese if (ret) { 45*303dfc2eSStefan Roese printf("Cannot find USB2513: %d\n", ret); 46*303dfc2eSStefan Roese return 0; 47*303dfc2eSStefan Roese } 48*303dfc2eSStefan Roese 49*303dfc2eSStefan Roese /* 50*303dfc2eSStefan Roese * The first access to the USB Hub fails sometimes, so lets read 51*303dfc2eSStefan Roese * a dummy byte to be sure here 52*303dfc2eSStefan Roese */ 53*303dfc2eSStefan Roese dm_i2c_read(dev, 0x00, buf, 1); 54*303dfc2eSStefan Roese 55*303dfc2eSStefan Roese /* 56*303dfc2eSStefan Roese * The SMSC hub is not visible on the I2C bus after the first 57*303dfc2eSStefan Roese * configuration at power-up. The following code deliberately 58*303dfc2eSStefan Roese * does not report upon failure of these I2C write calls. 59*303dfc2eSStefan Roese */ 60*303dfc2eSStefan Roese buf[0] = 0x93; 61*303dfc2eSStefan Roese dm_i2c_write(dev, 0x06, buf, 1); 62*303dfc2eSStefan Roese 63*303dfc2eSStefan Roese buf[0] = 0xaa; 64*303dfc2eSStefan Roese dm_i2c_write(dev, 0xf8, buf, 1); 65*303dfc2eSStefan Roese 66*303dfc2eSStefan Roese buf[0] = 0x0f; 67*303dfc2eSStefan Roese dm_i2c_write(dev, 0xfa, buf, 1); 68*303dfc2eSStefan Roese 69*303dfc2eSStefan Roese buf[0] = 0x01; 70*303dfc2eSStefan Roese dm_i2c_write(dev, 0xff, buf, 1); 71*303dfc2eSStefan Roese 72*303dfc2eSStefan Roese return 0; 73*303dfc2eSStefan Roese } 74