1*57efeb04SChia-Wei, Wang // SPDX-License-Identifier: GPL-2.0+ 2*57efeb04SChia-Wei, Wang /* 3*57efeb04SChia-Wei, Wang * Copyright (C) ASPEED Technology Inc. 4*57efeb04SChia-Wei, Wang */ 5*57efeb04SChia-Wei, Wang #include <common.h> 6*57efeb04SChia-Wei, Wang #include <asm/io.h> 7*57efeb04SChia-Wei, Wang #include <dm.h> 8*57efeb04SChia-Wei, Wang #include <dm/uclass.h> 9*57efeb04SChia-Wei, Wang 10*57efeb04SChia-Wei, Wang DECLARE_GLOBAL_DATA_PTR; 11*57efeb04SChia-Wei, Wang 12*57efeb04SChia-Wei, Wang #define AST_GPIO_BASE (0x1E780000) 13*57efeb04SChia-Wei, Wang #define AST_GPIOABCD_DRCTN (AST_GPIO_BASE + 0x004) 14*57efeb04SChia-Wei, Wang #define AST_GPIOEFGH_DRCTN (AST_GPIO_BASE + 0x024) 15*57efeb04SChia-Wei, Wang #define AST_GPIOMNOP_DRCTN (AST_GPIO_BASE + 0x07C) 16*57efeb04SChia-Wei, Wang #define AST_GPIOUVWX_DRCTN (AST_GPIO_BASE + 0x08C) 17*57efeb04SChia-Wei, Wang #define AST_GPIOYZ_DRCTN (AST_GPIO_BASE + 0x1E4) 18*57efeb04SChia-Wei, Wang 19*57efeb04SChia-Wei, Wang int board_init(void) 20*57efeb04SChia-Wei, Wang { 21*57efeb04SChia-Wei, Wang u32 direction; 22*57efeb04SChia-Wei, Wang 23*57efeb04SChia-Wei, Wang struct udevice *dev; 24*57efeb04SChia-Wei, Wang int i; 25*57efeb04SChia-Wei, Wang int ret; 26*57efeb04SChia-Wei, Wang 27*57efeb04SChia-Wei, Wang gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 28*57efeb04SChia-Wei, Wang 29*57efeb04SChia-Wei, Wang /* 30*57efeb04SChia-Wei, Wang * Loop over all MISC uclass drivers to call the comphy code 31*57efeb04SChia-Wei, Wang * and init all CP110 devices enabled in the DT 32*57efeb04SChia-Wei, Wang */ 33*57efeb04SChia-Wei, Wang i = 0; 34*57efeb04SChia-Wei, Wang while (1) { 35*57efeb04SChia-Wei, Wang /* Call the comphy code via the MISC uclass driver */ 36*57efeb04SChia-Wei, Wang ret = uclass_get_device(UCLASS_MISC, i++, &dev); 37*57efeb04SChia-Wei, Wang 38*57efeb04SChia-Wei, Wang /* We're done, once no further CP110 device is found */ 39*57efeb04SChia-Wei, Wang if (ret) 40*57efeb04SChia-Wei, Wang break; 41*57efeb04SChia-Wei, Wang } 42*57efeb04SChia-Wei, Wang 43*57efeb04SChia-Wei, Wang /* 44*57efeb04SChia-Wei, Wang * set 32 GPIO ouput pins for ATE report 45*57efeb04SChia-Wei, Wang * GPIOV[7:0] -> ATE[7:0] 46*57efeb04SChia-Wei, Wang * GPIOY[3:0] -> ATE[11:8] 47*57efeb04SChia-Wei, Wang * GPIOM[3:0] -> ATE[15:12] 48*57efeb04SChia-Wei, Wang * GPIOH[3:0] -> ATE[19:16] 49*57efeb04SChia-Wei, Wang * GPIOB[3:0] -> ATE[23:20] 50*57efeb04SChia-Wei, Wang * GPIOM[5:4] -> ATE[25:24] 51*57efeb04SChia-Wei, Wang * GPION[5:0] -> ATE[31:26] 52*57efeb04SChia-Wei, Wang */ 53*57efeb04SChia-Wei, Wang /* GPIOB[3:0] */ 54*57efeb04SChia-Wei, Wang direction = readl(AST_GPIOABCD_DRCTN); 55*57efeb04SChia-Wei, Wang direction |= 0xF00; 56*57efeb04SChia-Wei, Wang writel(direction, AST_GPIOABCD_DRCTN); 57*57efeb04SChia-Wei, Wang 58*57efeb04SChia-Wei, Wang /* GPIOH[3:0] */ 59*57efeb04SChia-Wei, Wang direction = readl(AST_GPIOEFGH_DRCTN); 60*57efeb04SChia-Wei, Wang direction |= 0xF000000; 61*57efeb04SChia-Wei, Wang writel(direction, AST_GPIOEFGH_DRCTN); 62*57efeb04SChia-Wei, Wang 63*57efeb04SChia-Wei, Wang /* GPIOM[3:0], GPIOM[5:4], GPION[5:0] */ 64*57efeb04SChia-Wei, Wang direction = readl(AST_GPIOMNOP_DRCTN); 65*57efeb04SChia-Wei, Wang direction |= 0x3F3F; 66*57efeb04SChia-Wei, Wang writel(direction, AST_GPIOMNOP_DRCTN); 67*57efeb04SChia-Wei, Wang 68*57efeb04SChia-Wei, Wang /* GPIOV[7:0] */ 69*57efeb04SChia-Wei, Wang direction = readl(AST_GPIOUVWX_DRCTN); 70*57efeb04SChia-Wei, Wang direction |= 0xFF00; 71*57efeb04SChia-Wei, Wang writel(direction, AST_GPIOUVWX_DRCTN); 72*57efeb04SChia-Wei, Wang 73*57efeb04SChia-Wei, Wang /* GPIOY[3:0] */ 74*57efeb04SChia-Wei, Wang direction = readl(AST_GPIOYZ_DRCTN); 75*57efeb04SChia-Wei, Wang direction |= 0xF; 76*57efeb04SChia-Wei, Wang writel(direction, AST_GPIOYZ_DRCTN); 77*57efeb04SChia-Wei, Wang 78*57efeb04SChia-Wei, Wang return 0; 79*57efeb04SChia-Wei, Wang } 80