157efeb04SChia-Wei, Wang // SPDX-License-Identifier: GPL-2.0+
257efeb04SChia-Wei, Wang /*
357efeb04SChia-Wei, Wang * Copyright (C) ASPEED Technology Inc.
457efeb04SChia-Wei, Wang */
557efeb04SChia-Wei, Wang #include <common.h>
657efeb04SChia-Wei, Wang #include <asm/io.h>
757efeb04SChia-Wei, Wang #include <dm.h>
857efeb04SChia-Wei, Wang #include <dm/uclass.h>
957efeb04SChia-Wei, Wang
1057efeb04SChia-Wei, Wang DECLARE_GLOBAL_DATA_PTR;
1157efeb04SChia-Wei, Wang
1257efeb04SChia-Wei, Wang #define AST_GPIO_BASE (0x1E780000)
1357efeb04SChia-Wei, Wang #define AST_GPIOABCD_DRCTN (AST_GPIO_BASE + 0x004)
1457efeb04SChia-Wei, Wang #define AST_GPIOEFGH_DRCTN (AST_GPIO_BASE + 0x024)
1557efeb04SChia-Wei, Wang #define AST_GPIOMNOP_DRCTN (AST_GPIO_BASE + 0x07C)
16*c409e06eSDylan Hung #define AST_GPIOQRST_DRCTN (AST_GPIO_BASE + 0x084)
1757efeb04SChia-Wei, Wang #define AST_GPIOUVWX_DRCTN (AST_GPIO_BASE + 0x08C)
1857efeb04SChia-Wei, Wang #define AST_GPIOYZ_DRCTN (AST_GPIO_BASE + 0x1E4)
1957efeb04SChia-Wei, Wang
board_init(void)2057efeb04SChia-Wei, Wang int board_init(void)
2157efeb04SChia-Wei, Wang {
2257efeb04SChia-Wei, Wang u32 direction;
2357efeb04SChia-Wei, Wang
2457efeb04SChia-Wei, Wang struct udevice *dev;
2557efeb04SChia-Wei, Wang int i;
2657efeb04SChia-Wei, Wang int ret;
2757efeb04SChia-Wei, Wang
2857efeb04SChia-Wei, Wang gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
2957efeb04SChia-Wei, Wang
3057efeb04SChia-Wei, Wang /*
3157efeb04SChia-Wei, Wang * Loop over all MISC uclass drivers to call the comphy code
3257efeb04SChia-Wei, Wang * and init all CP110 devices enabled in the DT
3357efeb04SChia-Wei, Wang */
3457efeb04SChia-Wei, Wang i = 0;
3557efeb04SChia-Wei, Wang while (1) {
3657efeb04SChia-Wei, Wang /* Call the comphy code via the MISC uclass driver */
3757efeb04SChia-Wei, Wang ret = uclass_get_device(UCLASS_MISC, i++, &dev);
3857efeb04SChia-Wei, Wang
3957efeb04SChia-Wei, Wang /* We're done, once no further CP110 device is found */
4057efeb04SChia-Wei, Wang if (ret)
4157efeb04SChia-Wei, Wang break;
4257efeb04SChia-Wei, Wang }
4357efeb04SChia-Wei, Wang
4457efeb04SChia-Wei, Wang /*
45*c409e06eSDylan Hung * in FT/SLT board, 4 MDIO channels are all connected to a single PHY
46*c409e06eSDylan Hung * chip. So only one MDIO channel can access the PHY chip at a time and
47*c409e06eSDylan Hung * the pins of the channels that are not under testing will be set to
48*c409e06eSDylan Hung * GPIO input. So simply the test program in Linux kernel, we configure
49*c409e06eSDylan Hung * GPIO setting here.
50*c409e06eSDylan Hung *
51*c409e06eSDylan Hung * GPIOS[1:0] -> MDC1 & MDIO1
52*c409e06eSDylan Hung * GPIOB[5:4] -> MDC2 & MDIO2
53*c409e06eSDylan Hung * GPIOA[1:0] -> MDC3 & MDIO3
54*c409e06eSDylan Hung * GPIOA[3:2] -> MDC4 & MDIO4
55*c409e06eSDylan Hung */
56*c409e06eSDylan Hung /* GPIOS[1:0] */
57*c409e06eSDylan Hung direction = readl(AST_GPIOQRST_DRCTN);
58*c409e06eSDylan Hung direction &= ~GENMASK(17, 16);
59*c409e06eSDylan Hung writel(direction, AST_GPIOQRST_DRCTN);
60*c409e06eSDylan Hung
61*c409e06eSDylan Hung /* GPIOA[3:0] and GPIOB[5:4] */
62*c409e06eSDylan Hung direction = readl(AST_GPIOABCD_DRCTN);
63*c409e06eSDylan Hung direction &= ~(GENMASK(3, 0) | GENMASK(13, 12));
64*c409e06eSDylan Hung writel(direction, AST_GPIOABCD_DRCTN);
65*c409e06eSDylan Hung
66*c409e06eSDylan Hung /*
6757efeb04SChia-Wei, Wang * set 32 GPIO ouput pins for ATE report
6857efeb04SChia-Wei, Wang * GPIOV[7:0] -> ATE[7:0]
6957efeb04SChia-Wei, Wang * GPIOY[3:0] -> ATE[11:8]
7057efeb04SChia-Wei, Wang * GPIOM[3:0] -> ATE[15:12]
7157efeb04SChia-Wei, Wang * GPIOH[3:0] -> ATE[19:16]
7257efeb04SChia-Wei, Wang * GPIOB[3:0] -> ATE[23:20]
7357efeb04SChia-Wei, Wang * GPIOM[5:4] -> ATE[25:24]
7457efeb04SChia-Wei, Wang * GPION[5:0] -> ATE[31:26]
7557efeb04SChia-Wei, Wang */
7657efeb04SChia-Wei, Wang /* GPIOB[3:0] */
7757efeb04SChia-Wei, Wang direction = readl(AST_GPIOABCD_DRCTN);
7857efeb04SChia-Wei, Wang direction |= 0xF00;
7957efeb04SChia-Wei, Wang writel(direction, AST_GPIOABCD_DRCTN);
8057efeb04SChia-Wei, Wang
8157efeb04SChia-Wei, Wang /* GPIOH[3:0] */
8257efeb04SChia-Wei, Wang direction = readl(AST_GPIOEFGH_DRCTN);
8357efeb04SChia-Wei, Wang direction |= 0xF000000;
8457efeb04SChia-Wei, Wang writel(direction, AST_GPIOEFGH_DRCTN);
8557efeb04SChia-Wei, Wang
8657efeb04SChia-Wei, Wang /* GPIOM[3:0], GPIOM[5:4], GPION[5:0] */
8757efeb04SChia-Wei, Wang direction = readl(AST_GPIOMNOP_DRCTN);
8857efeb04SChia-Wei, Wang direction |= 0x3F3F;
8957efeb04SChia-Wei, Wang writel(direction, AST_GPIOMNOP_DRCTN);
9057efeb04SChia-Wei, Wang
9157efeb04SChia-Wei, Wang /* GPIOV[7:0] */
9257efeb04SChia-Wei, Wang direction = readl(AST_GPIOUVWX_DRCTN);
9357efeb04SChia-Wei, Wang direction |= 0xFF00;
9457efeb04SChia-Wei, Wang writel(direction, AST_GPIOUVWX_DRCTN);
9557efeb04SChia-Wei, Wang
9657efeb04SChia-Wei, Wang /* GPIOY[3:0] */
9757efeb04SChia-Wei, Wang direction = readl(AST_GPIOYZ_DRCTN);
9857efeb04SChia-Wei, Wang direction |= 0xF;
9957efeb04SChia-Wei, Wang writel(direction, AST_GPIOYZ_DRCTN);
10057efeb04SChia-Wei, Wang
10157efeb04SChia-Wei, Wang return 0;
10257efeb04SChia-Wei, Wang }
103