1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2c291e2fcSPrafulla Wadaskar /* 3c291e2fcSPrafulla Wadaskar * (C) Copyright 2010 4c291e2fcSPrafulla Wadaskar * Marvell Semiconductor <www.marvell.com> 5c291e2fcSPrafulla Wadaskar * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 6c291e2fcSPrafulla Wadaskar * Contributor: Mahavir Jain <mjain@marvell.com> 7c291e2fcSPrafulla Wadaskar */ 8c291e2fcSPrafulla Wadaskar 9c291e2fcSPrafulla Wadaskar #include <common.h> 10c291e2fcSPrafulla Wadaskar #include <mvmfp.h> 11c62db35dSSimon Glass #include <asm/mach-types.h> 12ab1b9552SLei Wen #include <asm/arch/cpu.h> 13c291e2fcSPrafulla Wadaskar #include <asm/arch/mfp.h> 14c291e2fcSPrafulla Wadaskar #include <asm/arch/armada100.h> 15c291e2fcSPrafulla Wadaskar 16c291e2fcSPrafulla Wadaskar DECLARE_GLOBAL_DATA_PTR; 17c291e2fcSPrafulla Wadaskar board_early_init_f(void)18c291e2fcSPrafulla Wadaskarint board_early_init_f(void) 19c291e2fcSPrafulla Wadaskar { 20c291e2fcSPrafulla Wadaskar u32 mfp_cfg[] = { 2181a9ab21SLei Wen /* I2C */ 2281a9ab21SLei Wen MFP105_CI2C_SDA, 2381a9ab21SLei Wen MFP106_CI2C_SCL, 2481a9ab21SLei Wen 25c291e2fcSPrafulla Wadaskar /* Enable Console on UART1 */ 26c291e2fcSPrafulla Wadaskar MFP107_UART1_RXD, 27c291e2fcSPrafulla Wadaskar MFP108_UART1_TXD, 2881a9ab21SLei Wen 29c291e2fcSPrafulla Wadaskar MFP_EOC /*End of configureation*/ 30c291e2fcSPrafulla Wadaskar }; 31c291e2fcSPrafulla Wadaskar /* configure MFP's */ 32c291e2fcSPrafulla Wadaskar mfp_config(mfp_cfg); 33c291e2fcSPrafulla Wadaskar return 0; 34c291e2fcSPrafulla Wadaskar } 35c291e2fcSPrafulla Wadaskar board_init(void)36c291e2fcSPrafulla Wadaskarint board_init(void) 37c291e2fcSPrafulla Wadaskar { 38c291e2fcSPrafulla Wadaskar /* arch number of Board */ 39c291e2fcSPrafulla Wadaskar gd->bd->bi_arch_number = MACH_TYPE_ASPENITE; 40c291e2fcSPrafulla Wadaskar /* adress of boot parameters */ 41c291e2fcSPrafulla Wadaskar gd->bd->bi_boot_params = armd1_sdram_base(0) + 0x100; 42c291e2fcSPrafulla Wadaskar return 0; 43c291e2fcSPrafulla Wadaskar } 44