xref: /openbmc/u-boot/board/8dtech/eco5pk/eco5pk.c (revision a740ee913ec8ba04cc53100440f94841648324e2)
183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2843a7ee8SRaphael Assenat /*
3843a7ee8SRaphael Assenat  * eco5pk.c - board file for 8D Technology's AM3517 based eco5pk board
4843a7ee8SRaphael Assenat  *
5843a7ee8SRaphael Assenat  * Based on am3517evm.c
6843a7ee8SRaphael Assenat  *
7843a7ee8SRaphael Assenat  * Copyright (C) 2011-2012 8D Technologies inc.
8843a7ee8SRaphael Assenat  * Copyright (C) 2009 Texas Instruments Incorporated
9843a7ee8SRaphael Assenat  */
10843a7ee8SRaphael Assenat #include <common.h>
11843a7ee8SRaphael Assenat #include <netdev.h>
12843a7ee8SRaphael Assenat #include <asm/io.h>
13843a7ee8SRaphael Assenat #include <asm/arch/mem.h>
14843a7ee8SRaphael Assenat #include <asm/arch/mux.h>
15843a7ee8SRaphael Assenat #include <asm/arch/sys_proto.h>
16843a7ee8SRaphael Assenat #include <asm/arch/emac_defs.h>
17843a7ee8SRaphael Assenat #include <asm/gpio.h>
18843a7ee8SRaphael Assenat #include <i2c.h>
19*a740ee91SPhilipp Tomsich #include <u-boot/crc.h>
20843a7ee8SRaphael Assenat #include <asm/mach-types.h>
21843a7ee8SRaphael Assenat #include "eco5pk.h"
22843a7ee8SRaphael Assenat 
23843a7ee8SRaphael Assenat DECLARE_GLOBAL_DATA_PTR;
24843a7ee8SRaphael Assenat 
25843a7ee8SRaphael Assenat /*
26843a7ee8SRaphael Assenat  * Routine: board_init
27843a7ee8SRaphael Assenat  * Description: Early hardware init.
28843a7ee8SRaphael Assenat  */
board_init(void)29843a7ee8SRaphael Assenat int board_init(void)
30843a7ee8SRaphael Assenat {
31843a7ee8SRaphael Assenat 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
32843a7ee8SRaphael Assenat 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
33843a7ee8SRaphael Assenat 
34843a7ee8SRaphael Assenat 	gpio_request(30, "RESOUT");
35843a7ee8SRaphael Assenat 	gpio_direction_output(30, 1);
36843a7ee8SRaphael Assenat 	return 0;
37843a7ee8SRaphael Assenat }
38843a7ee8SRaphael Assenat 
39843a7ee8SRaphael Assenat /*
40843a7ee8SRaphael Assenat  * Routine: set_muxconf_regs
41843a7ee8SRaphael Assenat  * Description: Setting up the configuration Mux registers specific to the
42843a7ee8SRaphael Assenat  *		hardware. Many pins need to be moved from protect to primary
43843a7ee8SRaphael Assenat  *		mode.
44843a7ee8SRaphael Assenat  */
set_muxconf_regs(void)45843a7ee8SRaphael Assenat void set_muxconf_regs(void)
46843a7ee8SRaphael Assenat {
47843a7ee8SRaphael Assenat 	MUX_ECO5_PK();
48843a7ee8SRaphael Assenat }
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